13 Commits

Author	SHA1	Message	Date
Ross Thompson	de0bef4f5b	Updated wave.do to match the ifu/lsu changes.	2022-01-28 14:37:15 -06:00
Ross Thompson	1bb8d36308	Moved all instr/load/storeamo faults to mmu with the exception of instr misaligned fault.	2022-01-27 17:11:27 -06:00
David Harris	ca1f7ce5d3	Renamed wallypipelinedhart to wallypipelinedcore	2022-01-20 16:02:08 +00:00
David Harris	f7f3882cb8	Moved Dcache into bus block	2022-01-15 00:39:07 +00:00
David Harris	d9e8d16bbe	Renamed LSUStall to LSUStallM	2022-01-15 00:24:16 +00:00
Ross Thompson	861450c4d6	Fixed support to allow spills and no icache.	2022-01-12 17:25:16 -06:00
Ross Thompson	87485f9f64	Improve wavefile by adding performance counters.	2022-01-12 10:53:29 -06:00
Ross Thompson	55456e465c	Added icache access and icache miss to performance counters.	2022-01-09 22:56:56 -06:00
Ross Thompson	e01c8bc5f6	Added performance counters to wavefile.	2022-01-09 22:42:14 -06:00
Ross Thompson	3109fa1383	Fixed wavefile. ... Converted coremark to use elf2hex.	2022-01-09 22:03:10 -06:00
Ross Thompson	0310df96a4	Changes to wave file.	2022-01-05 14:16:59 -06:00
Ross Thompson	888a60d8d6	Switched block for line in caches.	2022-01-04 22:08:18 -06:00
David Harris	115287adc8	Renamed wally-pipelined to pipelined	2022-01-04 19:47:41 +00:00