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Fixed support to allow spills and no icache.
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@ -130,7 +130,7 @@ module ifu (
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assign PCNextFMux = SelNextSpill ? PCFp2[11:0] : PCNextF[11:0];
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assign PCFMux = SelSpill ? PCFp2 : PCF;
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assign Spill = &PCF[$clog2(`ICACHE_LINELENINBITS/32)+1:1];
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assign Spill = &PCF[$clog2(SPILLTHRESHOLD)+1:1];
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typedef enum {STATE_SPILL_READY, STATE_SPILL_SPILL} statetype;
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(* mark_debug = "true" *) statetype CurrState, NextState;
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@ -159,7 +159,7 @@ module ifu (
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flopenr #(16) SpillInstrReg(.clk(clk),
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.en(SpillSave),
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.reset(reset),
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.d(InstrRawF[15:0]),
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.d(`MEM_ICACHE ? InstrRawF[15:0] : InstrRawF[31:16]),
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.q(SpillDataLine0));
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assign PostSpillInstrRawF = Spill ? {InstrRawF[15:0], SpillDataLine0} : InstrRawF;
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@ -226,6 +226,7 @@ module ifu (
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// 3. wire pass-through
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localparam integer WORDSPERLINE = `MEM_ICACHE ? `ICACHE_LINELENINBITS/`XLEN : 1;
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localparam integer SPILLTHRESHOLD = `MEM_ICACHE ? `ICACHE_LINELENINBITS/32 : 1;
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localparam integer LOGWPL = `MEM_ICACHE ? $clog2(WORDSPERLINE) : 1;
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localparam integer LINELEN = `MEM_ICACHE ? `ICACHE_LINELENINBITS : `XLEN;
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localparam integer WordCountThreshold = `MEM_ICACHE ? WORDSPERLINE - 1 : 0;
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