bbracker
28abd28b1f
fixed InstrValid signals and implemented less costly MEPC loading
2021-06-02 10:03:19 -04:00
bbracker
a45b61ede9
turns out I should not have tried renaming FStallD to FPUStallD because that name was already used! All the same it does feel weird to have two such signals floating around \(ah pun!\)
2021-05-28 23:11:37 -04:00
Katherine Parry
71e4a10efb
FMV.D.X imperas test passes
2021-05-20 22:17:59 -04:00
Katherine Parry
409438bc95
floating point infinite loop removed from imperas tests
2021-05-18 10:42:51 -04:00
Thomas Fleming
980c00fa64
Clean up MMU code
2021-05-14 07:12:32 -04:00
Thomas Fleming
37bba95500
Fix compiler warning in PMP checker
2021-05-04 15:18:08 -04:00
Thomas Fleming
dac07e34cf
Fix bug in PMP checker
...
Now we only enforce PMP regions if at least one is non-null
2021-05-04 03:14:07 -04:00
Thomas Fleming
d7fa0903bc
Disable PMP checker to fix test loops
...
There is a bug in the PMP checker where S or U mode attempts to make a
memory access while no PMP registers are set. We currently treat this as
a failure, when this should instead be allowed.
2021-05-04 01:56:05 -04:00
Thomas Fleming
d53afc8510
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-05-03 23:15:39 -04:00
Domenico Ottolia
a7e89f43c1
Fix bug with IllegalInstrFaultM not getting correct value
2021-05-03 22:48:03 -04:00
Thomas Fleming
f78f2b3b5d
Adjust attributes in PMA checker
2021-05-03 21:58:32 -04:00
Domenico Ottolia
ab68933466
Fix bug that caused stvec to get the wrong value
2021-05-03 17:54:57 -04:00
Thomas Fleming
86a93d77b4
Implement PMP checker and revise PMA checker
2021-05-03 17:37:42 -04:00
Thomas Fleming
94d734cca9
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
...
Conflicts:
wally-pipelined/src/ebu/ahblite.sv
2021-05-03 14:02:19 -04:00
Katherine Parry
9252d08b41
fpu imperas tests run
2021-05-01 02:18:01 +00:00
Domenico Ottolia
830787e3e1
Make vectored interrupt trap handling work, and add tests for mtvec with vectored interrupts
2021-04-29 20:42:14 -04:00
Thomas Fleming
10c7260980
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-04-29 16:30:00 -04:00
ushakya22
de23edcfb9
fix to pcm bug
2021-04-29 15:21:08 -04:00
Thomas Fleming
e091f430e0
Clean up PMA checker and begin PMP checker
2021-04-29 02:20:39 -04:00
Ross Thompson
44d28dbd1c
Icache integrated!
...
Merge branch 'icache-almost-working' into main
2021-04-26 11:48:58 -05:00
bbracker
7947858481
it says I need to merge in order to pull
2021-04-26 07:46:24 -04:00
bbracker
8d77012995
progress on bus and lrsc
2021-04-26 07:43:16 -04:00
Ross Thompson
9e40fb072c
Merge branch 'tests' into icache-almost-working
2021-04-25 21:25:36 -05:00
Thomas Fleming
6f23858609
Fix HSIZE and HBURST signal widths in PMA checker
2021-04-23 20:11:43 -04:00
Thomas Fleming
5bff582608
Write PCM to TVAL registers
2021-04-22 16:17:57 -04:00
Thomas Fleming
07770a46d8
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-04-22 15:37:19 -04:00
Domenico Ottolia
787ae978d7
Fix misa synthesis bug (for real now)
2021-04-22 15:35:20 -04:00
Thomas Fleming
e7822ce20c
Implement first pass at the PMA checker
2021-04-22 15:34:02 -04:00
Domenico Ottolia
939e36a151
Fix misa bug
2021-04-22 00:59:07 -04:00
Thomas Fleming
70c801331a
Implement virtual memory protection
2021-04-21 19:58:36 -04:00
Domenico Ottolia
d5f86fadac
Add tests for sepc register
2021-04-20 23:50:53 -04:00
Domenico Ottolia
e02ff60b07
Fix synthesis warnings for privileged unit (replace 'initial' settings)
2021-04-20 17:57:56 -04:00
Domenico Ottolia
b1cd107a00
Add tests for scause and ucause
2021-04-15 19:41:25 -04:00
Domenico Ottolia
a149f2f3d8
Add support for vectored interrupts
2021-04-15 19:13:42 -04:00
bbracker
da22308e60
csri lint improvement
2021-04-15 09:05:53 -04:00
bbracker
ccff1e6c99
rv64 interrupt servicing
2021-04-14 10:19:42 -04:00
Thomas Fleming
ae888b5705
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
...
Conflicts:
wally-pipelined/src/ebu/pagetablewalker.sv
2021-04-13 13:42:03 -04:00
Thomas Fleming
f0c926cf68
Move InstrPageFault to fetch stage
2021-04-13 13:39:22 -04:00
Teo Ene
0bffac2c74
Various code syntax changes to bring HDL to a synthesizable level
2021-04-13 11:27:12 -05:00
Domenico Ottolia
1bdfac6a77
Cause an Illegal Instruction Exception when attempting to write readonly CSRs
2021-04-08 05:12:54 -04:00
Ross Thompson
d901cfc848
Merge branch 'icache_bp_bug' into tests
...
Not sure this merge is right.
2021-04-06 21:46:40 -05:00
Thomas Fleming
f9bf2fbc01
Implement sfence.vma and fix tlb writing
2021-04-01 15:55:05 -04:00
Ross Thompson
f1107c5d7b
Corrected a number of bugs in the branch predictor.
...
Added performance counters to individually track
branches; jumps, jump register, jal, and jalr; return.
jump and jump register are special cases of jal and jalr.
Similarlly return is a special case of jalr.
Also added counters to track if the branch direction was wrong,
btb target wrong, or the ras target was wrong.
Finally added one more counter to track if the BP incorrectly predicts
a non-cfi instruction.
2021-03-31 11:54:02 -05:00
Ross Thompson
1e83810450
Merge of main with the new icache and the branch predictor. I believe there is a bug in the icache with unaligned memory access. The second part of the access is incorrectly relying on the PCF being the address of the next two bytes of the instruction. However this is not always the case as the branch predictor can get the wrong target address. The icache needs to generate the +2 address internally.
2021-03-30 23:18:20 -05:00
Thomas Fleming
4b2765f8e2
Complete basic page table walker
2021-03-30 22:19:27 -04:00
Thomas Fleming
89a2fe5741
Finish finite state machines for page table walker
2021-03-25 02:48:40 -04:00
Thomas Fleming
4f01aae844
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-03-25 02:35:21 -04:00
bbracker
5327dcfcc8
instrfaults not respecting stalls bugfix
2021-03-25 00:16:26 -04:00
bbracker
3e656fc035
future work comment about suspicious-looking verilog in csri.sv
2021-03-25 00:10:44 -04:00
Thomas Fleming
f2604797fb
Add all PMP addr registers
2021-03-24 21:58:33 -04:00
