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69 Commits

Author SHA1 Message Date
Katherine Parry
75a8cea4e4 srt divider merged into fpu 2022-07-07 16:01:33 -07:00
Katherine Parry
c581fba4aa modified wally shared 2022-07-07 21:59:43 +00:00
David Harris
f2915129ab Preliminary SRAM integration 2022-07-07 19:56:20 +00:00
Katherine Parry
8ac722f693 Renaming signals to match chapter 2022-07-03 12:26:22 -07:00
cturek
7249295f53 Updated radix 2 divider to work with integers and floats in new structure. Integers still might not work. 2022-06-27 23:55:21 +00:00
Katherine Parry
70a1bb8377 fixed commented out error and removed killprod from result selection 2022-06-25 01:42:23 +00:00
slmnemo
528869ef14 Removed references to initialization files 2022-06-23 16:50:27 -07:00
Katherine Parry
de71773d69 added radix-4 0/d handling 2022-06-23 22:36:19 +00:00
Katherine Parry
1612daa294 Testfloat running division - not passing 2022-06-23 00:07:34 +00:00
Katherine Parry
03d823f5d7 added fld in rv32 - needs testing 2022-06-20 22:53:13 +00:00
Katherine Parry
2a8c17170c hopefully fixed lint error 2022-06-17 00:14:39 +00:00
Katherine Parry
5f7072bd96 postprocessing unit created and passing all tests 2022-06-13 22:47:51 +00:00
DTowersM
4e5d7ec3d6 changed DCACHE_LINELENINBITS and ICACHE_LINELENINBITS to 512, had to modigy the wfi test to increase timee before interupt to mantain compatability 2022-06-10 00:37:53 +00:00
Katherine Parry
eb93bd46d7 fma synth warnings and errors removed 2022-06-06 16:06:04 +00:00
Katherine Parry
019994c802 removed some debuging code accedentally pushed 2022-06-02 22:45:19 +00:00
Katherine Parry
39101fcbb3 added config rv64fpquad 2022-06-02 22:09:11 +00:00
Katherine Parry
c5bde75e30 added createallvectors 2022-06-02 21:56:05 +00:00
Katherine Parry
ccda4c771e fpu paramaterized - except fdivsqrt 2022-06-02 19:50:28 +00:00
slmnemo
61f077f62c Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-06-02 02:52:03 +00:00
slmnemo
35caa03e46 Updated Linux testbench to use new force/unforce method for Branch predictor init and removed related .txt files 2022-06-02 02:51:51 +00:00
Katherine Parry
74b549ddc8 paramerterized some small fma units 2022-06-01 23:34:29 +00:00
Katherine Parry
cc0ab94ebc Added fp tests - doesnpass yet 2022-05-19 16:32:30 +00:00
slmnemo
ede0a3237d quit 2022-05-17 01:03:09 +00:00
David Harris
8066ba45e8 Preliminary support for big endian modes. Regression passes but no big endian tests written yet. 2022-05-08 06:46:35 +00:00
Kip Macsai-Goren
3d1e1202f3 set WFI timeout to after 16 bits of counting for all configs 2022-04-28 18:14:08 +00:00
Kip Macsai-Goren
da29193f9b removed atomic, floating point from privileged tests configs 2022-04-25 19:13:15 +00:00
Kip Macsai-Goren
7fe33b2147 Lowered WFI timeout wait time for privileged configs 2022-04-25 17:47:10 +00:00
bbracker
5e76c83309 deprecate unused LINUX_FIX_READ macro 2022-04-21 19:14:47 -07:00
Kip Macsai-Goren
080963c381 fixed rv32ia to support clint and GPIO for priv tests 2022-04-20 17:31:34 +00:00
Shreya Sanghai
c3164f0ce1 added bpred size to wally config 2022-04-18 04:21:03 +00:00
David Harris
2436534687 First implementation of WFI timeout wait 2022-04-17 17:20:35 +00:00
Kip Macsai-Goren
c82667653c Added missing ZFH macro to new configs 2022-04-06 07:13:51 +00:00
Katherine Parry
20885f4dea generating all testfloat vectors 2022-04-04 17:17:12 +00:00
Kip Macsai-Goren
cdea062287 added RV64IA config to have a config without compressed instructions 2022-04-02 18:24:08 +00:00
Ross Thompson
57eba4355e Updated the fpga test bench. 2022-04-01 17:14:47 -05:00
Ross Thompson
6c9750c725 reverted temporary change to configs. 2022-03-22 22:31:34 -05:00
Ross Thompson
600a97982f Reverted change to configuration which caused issue with lint. 2022-03-22 21:44:08 -05:00
Katherine Parry
2042374102 FMA parameterized and FMA testbench reworked 2022-03-19 19:39:03 +00:00
Ross Thompson
e802deb4d6 Can now support the following memory and bus configurations. 
1. dtim/irom only
2. bus only
3. dtim/irom + bus
4. caches + bus
 2022-03-11 15:18:56 -06:00
bbracker
04ace8c154 switch linux-testbench infrastructure over to new linux testvectors at /opt/riscv 2022-03-01 03:11:43 +00:00
bbracker
6caa97bb26 change UART PLIC IRQ mapping from 4 to 10 to match virt model; move WALLY-PERIPH tests to wally arch tests 2022-02-22 03:46:08 +00:00
Ross Thompson
6cd9d84e7f New config option to enable hptw writes to PTE in memory to update Access and Dirty bits. 2022-02-17 17:19:41 -06:00
Ross Thompson
13561c67bd Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-02-08 14:22:19 -06:00
David Harris
c07584bb70 rv32e config update 2022-02-08 17:59:50 +00:00
Ross Thompson
c2377eaaf4 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-02-08 11:36:30 -06:00
Ross Thompson
3cd067ac6a Finished merge. 2022-02-08 11:36:24 -06:00
David Harris
9ad3f26365 Restored E tests to makefrag 2022-02-08 16:41:11 +00:00
David Harris
096242a6d8 Merged TIM and regular testbenches. RV32e now working and back in regression. 2022-02-08 12:18:13 +00:00
Ross Thompson
308cc34d6f Added config to allow using the save/restore or replay implementation to handle sram clocked read delay. 2022-02-04 23:49:07 -06:00
David Harris
0dd8c719ad Modified regression to use proper rv32e test name, but rv32e_wally32e still isn't passing due to loop exceeding iteration limit 2022-02-05 05:35:51 +00:00