216 Commits

Author	SHA1	Message	Date
Ross Thompson	195343c84f	Added if generate around bp logic only used with performance counters.	2023-02-23 14:39:31 -06:00
Ross Thompson	ed91fc5ce3	Renamed PCPredX to BTAX.	2023-02-23 14:33:32 -06:00
Kip Macsai-Goren	f8f89e692e	Fixed lint errors on zero and pop count. All of regression passes	2023-02-22 20:25:51 -08:00
Kip Macsai-Goren	82611ba889	Manual attempt to merge with upstream changes	2023-02-22 19:42:30 -08:00
Kip Macsai-Goren	21eaa0b989	Merge remote-tracking branch 'upstream/main' into main	2023-02-22 15:47:54 -08:00
Ross Thompson	1af7b8051e	Fixed bug in basic gshare.	2023-02-22 12:54:46 -06:00
Ross Thompson	fd5b940839	Merge branch 'main' of https://github.com/openhwgroup/cvw	2023-02-22 09:11:57 -06:00
Ross Thompson	5ecbc830cf	Oups. Turns out dc_shell does not like string parameters. ... Switched gshare to use an integer parameter to select between gshare and global.	2023-02-22 09:11:46 -06:00
Kip Macsai-Goren	66833f15f2	Merge remote-tracking branch 'upstream/main' into main	2023-02-21 14:48:41 -08:00
Kevin Kim	bb252acfbe	added individual zb tests in tests.vh and testbench ... - also minor alu/controller configurability changes	2023-02-21 11:52:05 -08:00
David Harris	bc4410e686	Merge branch 'main' of https://github.com/openhwgroup/cvw into dev	2023-02-21 09:58:18 -08:00
David Harris	8df7768d32	Fixed Issue #65 fmv sign selection. Sign needs to come from most significant bit of raw X source without doing NaN Box fixes first.	2023-02-21 09:57:57 -08:00
David Harris	0b9fd8a4b3	Fixed Issue #106: fld rasies load access fault instead of illegal instruction. The IEU controller had considered all fp loads and stores to be legal regardless of whether the FPU is enabled or the type is supported. Merged illegal instruction detection from both units into the Decode stage, saving two bits of pipeline register as well.	2023-02-21 09:32:17 -08:00
Ross Thompson	fd5c12431e	Fixed typo in the global branch predictor.	2023-02-20 18:48:02 -06:00
Ross Thompson	d2e06d9ef0	Cleanup branch predictor files.	2023-02-20 18:45:45 -06:00
Ross Thompson	a14c71bd95	Renamed branch predictors and consolidated global and gshare predictors.	2023-02-20 18:42:37 -06:00
Ross Thompson	68e39eeb66	Fixed another bug in the btb.	2023-02-20 17:54:22 -06:00
Ross Thompson	5187c78184	Fixed forwarding bug in the BTB.	2023-02-20 17:03:45 -06:00
Ross Thompson	d887124837	Found a bug where the d and i cache misses were not recorded in the performance counters.	2023-02-20 16:00:29 -06:00
Ross Thompson	1982c66b72	Simiplified BTB.	2023-02-20 15:39:42 -06:00
David Harris	bdcd867c11	Removed test code that broke LSU	2023-02-20 12:42:46 -08:00
David Harris	c6c21463d9	Merge branch 'main' of https://github.com/openhwgroup/cvw into dev	2023-02-20 11:28:15 -08:00
David Harris	081a817925	Merge pull request #98 from ross144/main ... New gshare implementation	2023-02-20 11:27:47 -08:00
David Harris	023ba68088	Extraction script updates to match new reports names	2023-02-20 10:16:45 -08:00
David Harris	df9950483e	Removed unused and incomplete ROM macro instantations	2023-02-20 05:59:57 -08:00
David Harris	a59526fc8e	Fixed IROM size parameters	2023-02-20 05:32:43 -08:00
David Harris	1d3b41e0fb	New expression for BTB_SIZE to avoid error during sky90 synthesis	2023-02-20 04:02:00 -08:00
Ross Thompson	2d417c33a4	Simplified BTB by removing the valid bit. the instruction class provides the equivalent information.	2023-02-19 23:53:20 -06:00
Ross Thompson	0d79c0cebe	Merge branch 'main' of https://github.com/openhwgroup/cvw	2023-02-19 22:54:27 -06:00
Ross Thompson	b32093b33b	Simplified branch predictor.	2023-02-19 22:49:48 -06:00
David Harris	0ac9c9e62a	Added BTB_SIZE parameter independent of BPRED_SIIZE	2023-02-19 20:13:50 -08:00
David Harris	5b197f4f9d	Parameterized btb to depend on BPRED_SIZE	2023-02-19 19:59:07 -08:00
Kip Macsai-Goren	8d0a600b96	Merge remote-tracking branch 'upstream/main' into main	2023-02-19 16:37:18 -08:00
David Harris	06872e3822	Adjusted DTIM to always be 512B independent of XLEN	2023-02-19 16:14:38 -08:00
David Harris	5b8d1e4134	PMP checker size check to avoid spurious warnings	2023-02-19 16:08:23 -08:00
David Harris	ac21bed64d	Moved conditional instantiation outside pmpchecker	2023-02-19 15:31:00 -08:00
David Harris	7d031fcae0	Disabled W64M register for RV32	2023-02-19 07:03:31 -08:00
David Harris	6d405ad69b	Fixed RAM instantiations	2023-02-19 06:31:41 -08:00
Ross Thompson	9ee48637dc	Possibly much better branch predictor implemention. ... The complexity is significantly reduced.	2023-02-19 00:17:37 -06:00
Kevin Kim	2069d92f9e	B DONE (for now) ... - datapath passes along comparator flag to alu - controllers and zbb handle min/max instructions	2023-02-18 22:12:55 -08:00
Ross Thompson	d44cb1febb	Minor fix.	2023-02-18 23:55:46 -06:00
Kevin Kim	888f4318bc	controlleres and zbb handle byte instructions	2023-02-18 21:06:55 -08:00
Kevin Kim	27581f8d28	alu and controllers handle andn, orn, xnor	2023-02-18 20:57:07 -08:00
Kevin Kim	ba968ed95e	added logic to handle sign/zero extend instructions	2023-02-18 20:32:40 -08:00
Kevin Kim	5c563bef43	fixed ctlzw bug in count unit	2023-02-18 20:12:30 -08:00
Kevin Kim	6d60268240	zbb handles count instructions	2023-02-18 20:12:17 -08:00
Kevin Kim	9760f0ccfd	fixed bmuctrl decode bug	2023-02-18 20:11:50 -08:00
Kevin Kim	84ddb6fb54	updated comments in bmuctrl	2023-02-18 19:57:10 -08:00
Kevin Kim	bec2905ee5	rotate instructions now handled in ZBB unit	2023-02-18 19:56:54 -08:00
Kevin Kim	e47cc222a6	removed redundant decode logic in bmuctrl	2023-02-18 19:50:36 -08:00
Kevin Kim	9203b0cc2f	began ZBB integration into ieu	2023-02-18 19:44:14 -08:00
Kevin Kim	7780cbd47a	bmuctrl handles roriw	2023-02-18 16:26:16 -08:00
Kip Macsai-Goren	883a6ca005	merge upstream synth changes	2023-02-18 14:35:19 -08:00
David Harris	0eda753dc4	Removed unused PredInstrClassE register from bpred	2023-02-18 05:59:25 -08:00
David Harris	0f4226a950	Removed unused weq0M register fron fdivsqrtpostproc	2023-02-18 05:57:39 -08:00
David Harris	66e5c60fb4	Fixed issue #57 of sign selection for improperly NaN-boxed number	2023-02-18 05:34:40 -08:00
David Harris	5986931fdc	Fixed unpacking of illegal NaN box. Fixed issue #56 of sign injection NaN	2023-02-18 05:25:38 -08:00
Kevin Kim	92c0d3a4ed	configured shifter in alu	2023-02-17 21:58:49 -08:00
Kevin Kim	182b27dfc8	shifter bug fix ... - roli not passing unless I keep the MSB (instead of inverting) of truncated offset	2023-02-17 21:58:26 -08:00
Kevin Kim	c353378da8	controller supports some rotates	2023-02-17 21:57:34 -08:00
Kevin Kim	4a52b57002	bmuctrl supports some rotates	2023-02-17 21:57:19 -08:00
David Harris	dc19f8a8ec	Created PostBox signal to NaN-box malformed NaNs of excess length. Fixes Issue #55	2023-02-17 20:51:43 -08:00
Kevin Kim	50ec6baa07	added zero extend, pre-shift mux to ALU	2023-02-17 20:15:12 -08:00
Kevin Kim	e2d90a9422	more elegant ZBA logic in controller	2023-02-17 20:14:47 -08:00
Kevin Kim	cd92d6e5d1	bmuctrl handles .uw instructions	2023-02-17 20:14:13 -08:00
David Harris	a194740562	Fixed RAM bugs and refactored with read taking place after clock edge rather than before.	2023-02-17 19:14:38 -08:00
Kevin Kim	750882455f	controller supports ZBA instructions	2023-02-17 16:44:16 -08:00
Kevin Kim	fcae58fcc7	removed Funct7 in Execute Stage	2023-02-17 16:12:09 -08:00
David Harris	9275bfb839	Memory synthesis updates	2023-02-17 15:33:49 -08:00
David Harris	2060683770	Continue fixing memory macros for synthesis	2023-02-17 15:15:37 -08:00
Ross Thompson	0cacfbd322	Renamed globalhistory predictor.	2023-02-17 16:08:34 -06:00
Ross Thompson	2f1bebfd57	Fixed global history predictor.	2023-02-17 16:05:48 -06:00
Ross Thompson	a95be0b567	More updates.	2023-02-17 15:53:49 -06:00
Ross Thompson	df4a27a2e3	Updated global history predictor.	2023-02-17 15:53:15 -06:00
David Harris	3523318acb	Synthesis with memories	2023-02-17 13:51:05 -08:00
Ross Thompson	0d271130b9	Fixed a branch predictor performance issue.	2023-02-17 15:37:03 -06:00
Kevin Kim	9bf11471aa	bmuctrl checks for illegal zbs-style instructions	2023-02-17 12:54:08 -08:00
Kevin Kim	0bab3bec3d	bctrl bug fix ... - bctrl decodes shift immediate instructions properly	2023-02-17 11:16:29 -08:00
Kevin Kim	bb79b57cc1	alu bug fix ... - condmaskb piped in correctly instead of b	2023-02-17 11:02:07 -08:00
Kevin Kim	ee3a520a1f	alu looks at BSelect, added BSelect one hot signal	2023-02-17 09:51:49 -08:00
Ross Thompson	5d5e4580d4	Merge branch 'main' of github.com:ross144/cvw	2023-02-17 10:58:16 -06:00
Ross Thompson	a325adf1be	Fixed bug with branch predictor.	2023-02-17 10:57:50 -06:00
Kevin Kim	890c54bc0b	added alu changes to previous commit	2023-02-17 08:22:13 -08:00
Kevin Kim	ec2421ead4	added BSelect Signal ... - BSelect [3:0] is a one hot encoding of if it's a ZBA_ZBB_ZBC_ZBS instruction	2023-02-17 08:21:55 -08:00
Kevin Kim	81cb00aaee	comments	2023-02-17 07:53:14 -08:00
Kevin Kim	505f3bf42f	comments	2023-02-17 07:52:54 -08:00
Kevin Kim	256d362e0d	comment formatting	2023-02-17 07:51:28 -08:00
Kevin Kim	9ab8183e80	alu handles ALU select instead of funct3	2023-02-17 07:51:10 -08:00
Kevin Kim	9128ac5409	added BMU controll	2023-02-17 07:50:59 -08:00
Kevin Kim	25c0811d3d	Added ALUSelect signal into datapath, ieu, controller	2023-02-17 07:50:45 -08:00
David Harris	c3cc2f98d6	Reverted lab3 changes in dev branch	2023-02-16 18:10:05 -08:00
David Harris	5fef9de80e	Merge branch 'lab3_2023' of https://github.com/openhwgroup/cvw into dev	2023-02-16 17:57:51 -08:00
David Harris	532abb5b95	Update datapath.sv	2023-02-16 17:53:31 -08:00
David Harris	6527257305	Update controller.sv	2023-02-16 17:52:44 -08:00
David Harris	685d3ff568	Update alu.sv	2023-02-16 17:52:25 -08:00
Ross Thompson	27f6552315	keep this commit off of cvw.	2023-02-16 11:05:24 -06:00
David Harris	d83c61cafc	Added SSTC support for supervisor timer compare, but presently disable support. Reenable for rv32gc and rv64gc after tests pass.	2023-02-16 07:37:12 -08:00
Kevin Kim	465aad372a	added comments to zbc units	2023-02-15 17:42:32 -08:00
Kevin Kim	aad4d13603	zbc configurability and select mux	2023-02-15 17:39:37 -08:00
Kevin Kim	068ddc3e0d	controller forwards funct7 ... - started the bmu controll register	2023-02-15 17:38:12 -08:00