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6103 Commits

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Author SHA1 Message Date
Limnanthes Serafini
c55aefc320 Merge branch 'openhwgroup:main' into cachesim 2023-04-03 14:10:43 -07:00
Limnanthes Serafini
d48a6c1190 Moved simulator into bin, added pLRU clearing 2023-04-03 14:10:27 -07:00
Ross Thompson
91e4e64f3d Merge pull request #178 from AlecVercruysse/coverage 
Improve I$ coverage by simplifying logic
 2023-04-03 14:22:46 -05:00
David Harris
ad0b430c63 Merge pull request #189 from kipmacsaigoren/bitmanip_cleanup 
Bitmanip: Removed Comparator Flag to ALU
 2023-04-03 06:04:58 -07:00
Kevin Kim
b38d34b925 Merge branch 'bitmanip_cleanup' of https://github.com/kipmacsaigoren/cvw into bitmanip_cleanup 2023-04-02 21:14:35 -07:00
Kevin Kim
8252706691 removed comparator flag to ALU 2023-04-02 21:14:31 -07:00
Kevin Kim
238e97d379 signal renaming on bitmanip alu and alu 2023-04-02 18:42:41 -07:00
David Harris
5712b905a7 Merge pull request #177 from amaiuolo/main 
Integrated tv generation for IFdivsqrt
 2023-04-02 18:29:38 -07:00
Kevin Kim
f175f7e927 changed signal names on clmul and zbc to match book 2023-04-02 18:28:09 -07:00
David Harris
f870b6ac1f Merge pull request #187 from stineje/main 
Update one bug in testfloat - still have to fix fpdiv but others shou…
 2023-04-02 18:27:39 -07:00
James Stine
e513c315c9 Update one bug in testfloat - still have to fix fpdiv but others should now all work 2023-04-02 18:16:23 -05:00
David Harris
0b5bc37424 Merge pull request #180 from infinitymdm/main 
Remove some fpu/fctrl test cases from coverage statistics
 2023-03-31 08:31:08 -07:00
Marcus Mellor
fd08ff2e60 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-31 10:29:10 -05:00
Mike Thompson
9abfef7c39 Merge pull request #179 from davidharrishmc/dev 
Fixed broken regression: privileged tests and build root
 2023-03-31 10:56:27 -04:00
Marcus Mellor
219176db9b Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-31 09:54:02 -05:00
Marcus Mellor
09b2cd304f Address comments in openhwgroup/cvw#180 2023-03-31 09:51:33 -05:00
David Harris
beb73f3ec2 Merge pull request #182 from dherreravicioso/main 
Added test cases to write to CSRs
 2023-03-31 06:32:12 -07:00
Diego Herrera Vicioso
e711948369 Merge branch 'openhwgroup:main' into main 2023-03-31 00:35:02 -07:00
Diego Herrera Vicioso
2d1806c5d0 Merge pull request #1 from dherreravicioso/AW_DH_privunit 
Added test coverage cases for writing to CSRs
 2023-03-31 00:34:21 -07:00
David Harris
4069f4ba8d Merge pull request #181 from kipmacsaigoren/bitmanip_cleanup 
Bitmanip cleanup
 2023-03-30 19:23:54 -07:00
Kevin Kim
2c6359b097 only pass in relevant comparator flag to ALU 2023-03-30 19:15:33 -07:00
Kevin Kim
1e88ec7eac Merge branch 'bitmanip_cleanup' of https://github.com/kipmacsaigoren/cvw into bitmanip_cleanup 2023-03-30 19:04:41 -07:00
Kevin Kim
27a5c9c5d6 Merge branch 'openhwgroup:main' into bitmanip_cleanup 2023-03-30 19:04:36 -07:00
Marcus Mellor
d4cb1a8582 Add comments to fpu.S indicating which lines of src/fpu/fctrl.sv are covered 2023-03-30 20:01:11 -05:00
Marcus Mellor
3afd963a9e Disable coverage for branches tested in fpu.s 2023-03-30 19:44:55 -05:00
David Harris
da53f240d3 Refactored InstrValidNotFlushed into CSR Write signals 2023-03-30 17:06:09 -07:00
David Harris
406bb22b6a Started factoring out InstrValidNotFlushed from CSRs 2023-03-30 14:56:19 -07:00
David Harris
f34218666a fctrl updated and buildroot working again 2023-03-30 13:17:15 -07:00
David Harris
9129c3ac22 fctrl continued cleanup 2023-03-30 13:07:39 -07:00
David Harris
01c5d58a64 fctrl continued cleanup 2023-03-30 13:05:56 -07:00
David Harris
b2a102ce79 Started to clean up fctrl 2023-03-30 12:57:14 -07:00
Alec Vercruysse
4b58bb55f2 Make entire cache write path conditional on READ_ONLY_CACHE 2023-03-30 10:32:40 -07:00
David Harris
2924179424 Merge pull request #176 from kipmacsaigoren/priv-tests 
Fixed regression after cause CSR fix
 2023-03-30 07:02:47 -07:00
Alessandro Maiuolo
9b290669d5 integrated tv generation for IFdivsqrt 2023-03-29 20:57:26 -07:00
Kip Macsai-Goren
3805cf993a unnecessary comments cleanup 2023-03-29 19:32:57 -07:00
Kip Macsai-Goren
cfb236dd13 Merge branch 'priv-tests' of github.com:kipmacsaigoren/cvw into priv-tests 2023-03-29 16:31:35 -07:00
Kip Macsai-Goren
a7c9d3d37b ported medelg fixes to 32 bit tests. Requires a make allclean 2023-03-29 16:31:28 -07:00
kipmacsaigoren
5cc1bc97da Merge branch 'openhwgroup:main' into priv-tests 2023-03-29 15:34:47 -07:00
David Harris
6934a32747 Merge pull request #175 from SydRiley/main 
Starting IFU coverage expansion
 2023-03-29 15:29:16 -07:00
Sydney Riley
4bd3121364 Manual merge in the coverage64gc 2023-03-29 15:25:27 -07:00
Kip Macsai-Goren
2e151b6b08 updated tests to reflect non-writeable bits of deleg 2023-03-29 15:24:00 -07:00
Sydney Riley
20fec0177d Corrected authorship for IFU.S tests file 2023-03-29 15:20:46 -07:00
Sydney Riley
b0237eaa8b Starting IFU tests including c.fld compressed instruction 2023-03-29 15:15:47 -07:00
Kip Macsai-Goren
491ef14b71 Resolved ImperasDV receiving incorrect cause values 2023-03-29 15:04:56 -07:00
Alec Vercruysse
d507f85190 icache coverage improvements by simplifying logic 2023-03-29 13:04:00 -07:00
Ross Thompson
5c4b753a1e Merge pull request #173 from davidharrishmc/dev 
Test improvements including FPU coverage
 2023-03-29 13:00:25 -05:00
David Harris
9d8f9e4428 Reduced number of bits in mcause and medeleg registers 2023-03-29 07:02:09 -07:00
David Harris
59f825a54b Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-29 06:19:10 -07:00
David Harris
d604a4fd33 Merge pull request #171 from AlecVercruysse/fix_152 
add check for legal funct3 for IW instructions
 2023-03-29 06:18:31 -07:00
David Harris
d059da6eca Turned on FS bit in fpu.S coverage test 2023-03-29 06:10:05 -07:00