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Author	SHA1	Message	Date
Jordan Carlin	b8d50fd621	Switch back to standard riscv-arch-test repo	2024-10-14 00:42:47 -07:00
Jordan Carlin	dc98f29ffa	Add --no-buildroot option to installation script	2024-10-14 00:06:05 -07:00
Jordan Carlin	77eb250ef6	Fix sphinx version format	2024-10-14 00:05:37 -07:00
Jordan Carlin	48ee8b0a18	Fix sphinx version format	2024-10-14 00:02:07 -07:00
Jordan Carlin	0cb1ac70f6	Limit Sphinx version	2024-10-14 00:01:47 -07:00
Jordan Carlin	1cb22fbe8a	Fix duplicate riscv-isac	2024-10-13 20:35:36 -07:00
Jordan Carlin	ab1797753b	Revert "Use python 3.11 for rhel 8" ... This reverts commit d76cda4dd7613583d41a4bc4624a1915f490a583.	2024-10-13 20:28:51 -07:00
Jordan Carlin	1076b9c179	Use python 3.11 for rhel 8	2024-10-13 20:28:43 -07:00
Jordan Carlin	20b157de62	Remove manual riscv-isac installation	2024-10-13 20:28:35 -07:00
Jordan Carlin	5f28ee5959	Test forked riscv-arch-test	2024-10-13 20:28:25 -07:00
Jordan Carlin	826b3775b6	Add setuptools to pip	2024-10-13 20:28:09 -07:00
Jordan Carlin	5580bf2fb0	Attempt clone and install riscv-isac	2024-10-13 20:27:56 -07:00
Jordan Carlin	8f3d888da5	Attempt to install riscof only	2024-10-13 20:27:46 -07:00
Jordan Carlin	3c88bb9771	Temporarily remove sphinx-rtd-theme from requirements.txt	2024-10-13 20:27:36 -07:00
Jordan Carlin	0f2dae0da1	Temporarily remove sphinx from requirements.txt	2024-10-13 20:27:24 -07:00
Jordan Carlin	3084fa9c37	Temporarily remove PyYAML from requirements.txt	2024-10-13 20:27:13 -07:00
Jordan Carlin	1e34a97068	Temporarily remove matplotlib	2024-10-13 20:26:57 -07:00
David Harris	1655c6f67c	Merge pull request #1006 from Mysterio-Abdullah/Config ... Configuring Zcb	2024-10-13 17:45:24 -07:00
Mysterio-Abdullah	da35944dce	Configuring Zcb	2024-10-13 17:41:59 -07:00
David Harris	515af445b5	Merge pull request #1005 from jordancarlin/mem_limit ... Limit number of threads if 8 GB of memory	2024-10-13 17:34:55 -07:00
Jordan Carlin	d5649f6f1d	Limit number of threads if 8 GB of memory	2024-10-13 17:32:38 -07:00
David Harris	d15500256d	Merge pull request #1001 from coreyqh/main ... added Zfh coverage for rv{32/64}gc	2024-10-10 13:05:26 -07:00
Corey Hickson	91299e3ce4	added Zfh coverage for rv{32/64}gc	2024-10-10 12:58:17 -07:00
Jordan Carlin	a03ecd0d97	Merge pull request #999 from rosethompson/main ... Removes conflicting FPGA zsbl file	2024-10-10 12:03:58 -07:00
Rose Thompson	a57453b343	Merge branch 'main' of https://github.com/openhwgroup/cvw	2024-10-10 13:00:26 -05:00
Rose Thompson	decdc62dc8	Merge pull request #998 from davidharrishmc/dev ... Give errror on unsupported simulations, remove/trim old docs	2024-10-10 12:58:44 -05:00
David Harris	fba6c60655	Removed and trimmed old docs per Issue #979	2024-10-10 10:55:24 -07:00
David Harris	3fdc0e34ce	Don't allow testbench_fp to run under VCS or Verilator because it is defective on those	2024-10-10 10:49:59 -07:00
Rose Thompson	c62b73de7d	Merge pull request #996 from davidharrishmc/dev ... Commented out privileged test runs to reduce fcov runtime for most users	2024-10-10 09:14:03 -05:00
Rose Thompson	9ddbc8bc24	Merge branch 'main' of https://github.com/openhwgroup/cvw	2024-10-10 09:11:30 -05:00
David Harris	bd22b8e0e6	Commented out privileged test runs for now to reduce fcov runtime	2024-10-09 16:23:58 -07:00
Rose Thompson	a3f2085a60	Merge pull request #995 from jordancarlin/riscv-isac-install ... Install riscv-isac from riscv-arch-test subdirectory	2024-10-09 16:46:48 -05:00
Rose Thompson	9bbf2a9375	Merge pull request #994 from JacobPease/main ... Removed axi sdc stuff from the Linux directory.	2024-10-09 12:43:23 -05:00
Jordan Carlin	38f77d734e	Install riscv-isac from riscv-arch-test subdirectory	2024-10-09 10:03:11 -07:00
Jacob Pease	7f9e97d864	Forgot to add Makefile.	2024-10-09 11:07:40 -05:00
David Harris	1beff89b68	Merge branch 'main' of https://github.com/openhwgroup/cvw into dev	2024-10-08 20:37:34 -07:00
Jacob Pease	ec7ef35f15	Merge branch 'main' of github.com:openhwgroup/cvw	2024-10-08 16:45:14 -05:00
Jacob Pease	8ef3aa2a2c	Removed axi sdc stuff from the Linux directory.	2024-10-08 16:44:47 -05:00
David Harris	55be7fc3ea	Merge pull request #993 from 10x-Engineers/rvvi_setup ... Adding DUT signals to tracer for VM Coverage	2024-10-08 05:26:12 -07:00
Huda-10xe	61d24f7256	reverting submodule to its original	2024-10-07 04:51:49 -07:00
Huda-10xe	58a534a973	revertung submodule to its original	2024-10-07 04:49:33 -07:00
Huda-10xe	fba5214a00	Adding a separate folder for priv coverage files	2024-10-07 04:34:09 -07:00
Huda-10xe	9cd466a5f2	Restoring cvw-arch-verif submodule	2024-10-07 03:57:31 -07:00
Huda-10xe	b77df83b59	Adding DUT signals to the tracer for VM Coverage	2024-10-07 03:52:36 -07:00
Huda-10xe	896ff562a1	adding privilege tests to regression	2024-10-07 03:51:11 -07:00
Huda-10xe	24f97fa696	Adding DUT signals to the tracer for VM Coverage	2024-10-07 03:49:43 -07:00
Huda-10xe	e0ea37fe21	Merge branch 'main' of https://github.com/openhwgroup/cvw into rvvi_setup	2024-10-07 03:44:43 -07:00
Huda-10xe	0817c69152	Adding priv coverage to ISACOV	2024-10-07 03:44:35 -07:00
David Harris	91a2defb4e	Merge branch 'main' of https://github.com/openhwgroup/cvw into dev	2024-10-05 19:55:36 -07:00
Rose Thompson	d6944cdaa4	Revmoed file from fpga zbbl which should not have been added.	2024-10-03 15:03:15 -05:00