Ross Thompson
							
						 
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							077bc35e10
							
						
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							Updated lsu so it is possible to condictionally implement dcache or passthrough to ebu.
						
						
						
						
						
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						2021-12-29 22:24:37 -06:00 | 
					
					
						
						
							
							
							
						
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								David Harris
							
						 
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							d8ba97cf71
							
						
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							RV32ic tests running for simple machine with no privileged unit
						
						
						
						
						
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						2021-12-30 02:25:46 +00:00 | 
					
					
						
						
							
							
							
						
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								David Harris
							
						 
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							98aaa970dd
							
						
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							rv32i regression and linting
						
						
						
						
						
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						2021-12-30 00:53:39 +00:00 | 
					
					
						
						
							
							
							
						
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								Ross Thompson
							
						 
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							b1116600fe
							
						
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							Added more generates around virtual memory and csrs in the lsu.
						
						
						
						
						
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						2021-12-29 14:48:09 -06:00 | 
					
					
						
						
							
							
							
						
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								David Harris
							
						 
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							52a38c5856
							
						
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							Added performance counting to sumtest and added imperas32/64periph to testbench.
						
						
						
						
						
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						2021-12-29 00:28:51 +00:00 | 
					
					
						
						
							
							
							
						
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								David Harris
							
						 
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							6e20d011d5
							
						
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							Fixed imperas C tests
						
						
						
						
						
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						2021-12-26 04:45:06 +00:00 | 
					
					
						
						
							
							
							
						
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								David Harris
							
						 
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							e6ed1372a7
							
						
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							Incorporated new Imperas tests.  f and d tests are failing and c tests are hanging.
						
						
						
						
						
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						2021-12-26 04:36:53 +00:00 | 
					
					
						
						
							
							
							
						
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								David Harris
							
						 
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							48bb534658
							
						
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							Started FIR test code and started incorporating Imperas tests
						
						
						
						
						
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						2021-12-25 22:39:51 +00:00 | 
					
					
						
						
							
							
							
						
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								David Harris
							
						 
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							3c3bfd055e
							
						
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							Moved generate statements for optional units into wallypipelinedhart
						
						
						
						
						
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						2021-12-19 16:53:41 -08:00 | 
					
					
						
						
							
							
							
						
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								David Harris
							
						 
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							865d5ce0b1
							
						
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							Renamed dtim->ram and boottim ->bootrom
						
						
						
						
						
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						2021-12-14 13:43:06 -08:00 | 
					
					
						
						
							
							
							
						
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								Kevin
							
						 
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							98420cb988
							
						
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							dot stars conversions on the rest of the testbenches
						
						
						
						
						
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						2021-12-12 17:53:26 -08:00 | 
					
					
						
						
							
							
							
						
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								Ross Thompson
							
						 
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							b03ca464f1
							
						
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							Mostly integrated FPGA flow into main branch.  Not all tests passing yet.
						
						
						
						
						
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						2021-12-02 18:00:32 -06:00 | 
					
					
						
						
							
							
							
						
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								Ross Thompson
							
						 
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							055a5bd202
							
						
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							Removed unneeded check for icache ways.
						
						
						
						
						
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						2021-11-20 22:44:37 -06:00 | 
					
					
						
						
							
							
							
						
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								David Harris
							
						 
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							60573b92b2
							
						
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							Adding custom Wally test infrastructure
						
						
						
						
						
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						2021-11-01 08:48:46 -07:00 | 
					
					
						
						
							
							
							
						
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								David Harris
							
						 
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							247f247ad3
							
						
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							tesgen cleanup, added riscv-arch-test D tests
						
						
						
						
						
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						2021-10-29 22:31:48 -07:00 | 
					
					
						
						
							
							
							
						
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								David Harris
							
						 
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							5783e47e1a
							
						
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							Changes for floating point sims
						
						
						
						
						
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						2021-10-27 10:37:35 -07:00 | 
					
					
						
						
							
							
							
						
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								David Harris
							
						 
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							2bf51362e2
							
						
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							Added synchronizer to reset
						
						
						
						
						
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						2021-10-25 10:05:41 -07:00 | 
					
					
						
						
							
							
							
						
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								David Harris
							
						 
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							2cfbd888fd
							
						
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							more lsu/ifu lint cleanup
						
						
						
						
						
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						2021-10-23 12:00:32 -07:00 | 
					
					
						
						
							
							
							
						
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								David Harris
							
						 
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							e2e950ac0f
							
						
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							Cleaned up LINT erors
						
						
						
						
						
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						2021-10-23 06:28:49 -07:00 | 
					
					
						
						
							
							
							
						
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								David Harris
							
						 
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							3249d65209
							
						
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							Added -lint flag to vsim.  Cleaned some lint errors.  Moved lint-wally to regression directory for convenience.
						
						
						
						
						
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						2021-10-23 06:15:26 -07:00 | 
					
					
						
						
							
							
							
						
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								David Harris
							
						 
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							75c17dc372
							
						
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							Major reorganization of regression and simulation and testbenches
						
						
						
						
						
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						2021-10-10 15:07:51 -07:00 | 
					
					
						
						
							
							
							
						
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