David Harris
|
22842816a8
|
LSU name cleanup
|
2022-04-18 03:18:38 +00:00 |
|
Ross Thompson
|
da93d14050
|
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
|
2022-03-31 16:30:55 -05:00 |
|
Ross Thompson
|
ade4a4cd5e
|
Notes on what to change in ram.sv.
|
2022-03-31 15:48:15 -05:00 |
|
Ross Thompson
|
f52ab01362
|
Partial cleanup of memories.
|
2022-03-30 11:09:21 -05:00 |
|
Ross Thompson
|
66e9380cfb
|
Partial fix to allow byte write enables with fpga and still get a preload to work.
|
2022-03-29 19:12:29 -05:00 |
|
Ross Thompson
|
86cc758354
|
cleanup of ram.sv
|
2022-03-11 18:09:22 -06:00 |
|
Ross Thompson
|
d0cf41dbe4
|
Simplified byte write enable logic.
|
2022-03-10 18:13:35 -06:00 |
|
Ross Thompson
|
396c97fc36
|
Byte write enables are passing all configs now.
|
2022-03-10 17:26:32 -06:00 |
|
Ross Thompson
|
d8e71e8e35
|
Progress on the path to getting all configs working with byte write enables.
|
2022-03-10 17:02:52 -06:00 |
|
Ross Thompson
|
73edd50120
|
Updated fpga's bootloader to reflect the changes to the gpio address change.
|
2022-02-01 10:43:24 -06:00 |
|
David Harris
|
07425369fc
|
Renamed wallypipelinedhart to wallypipelinedcore
|
2022-01-20 16:02:08 +00:00 |
|
Ross Thompson
|
aad28366d7
|
Partial local dtim in lsu configuration.
|
2022-01-13 17:50:31 -06:00 |
|
David Harris
|
120fb7863f
|
Reformatted MIT license to 95 characters
|
2022-01-07 12:58:40 +00:00 |
|
David Harris
|
32590d484c
|
Removed more generate statements
|
2022-01-05 16:25:08 +00:00 |
|
David Harris
|
b36ace221e
|
Renamed wally-pipelined to pipelined
|
2022-01-04 19:47:41 +00:00 |
|