David Harris
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addc757718
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Merge pull request #497 from ross144/main
Simplified buildroot build process
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2023-11-21 18:59:34 -08:00 |
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Rose Thompson
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07cfcfdee1
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-11-21 20:48:47 -06:00 |
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Rose Thompson
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8383a80c62
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Ok the disassemble recipe should work now.
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2023-11-21 20:47:57 -06:00 |
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Rose Thompson
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13114604e3
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Ok this is much better. Thanks Jacob for the tip about vmlinux always being generated.
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2023-11-21 20:21:26 -06:00 |
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David Harris
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825591ec62
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Merge pull request #496 from ross144/main
Updated Linux Makefile to support generating vmlinux and disassembly required for questa
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2023-11-21 16:25:16 -08:00 |
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Rose Thompson
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9322553abc
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Removed testing hack.
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2023-11-21 18:24:45 -06:00 |
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Rose Thompson
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fb7730a606
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Merge branch 'main' of github.com:ross144/cvw
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2023-11-21 18:20:47 -06:00 |
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Rose Thompson
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8eef7994ba
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Fix to linux makefile to support disassembly and creating vmlinux automatically.
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2023-11-21 18:20:37 -06:00 |
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David Harris
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b35f0e2edf
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Merge pull request #495 from ross144/main
updates to imperas.ic for updated venture id and arch id.
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2023-11-21 14:03:51 -08:00 |
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Rose Thompson
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36bee19821
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Updates to buildroot config.
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2023-11-21 16:01:42 -06:00 |
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Rose Thompson
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accc481743
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-11-21 15:56:47 -06:00 |
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Rose Thompson
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5f4e36138b
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Updated imperad dv vendor id and architecture id config.
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2023-11-21 15:14:17 -06:00 |
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Rose Thompson
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09b04fca35
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Disable the trace for normal operation.
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2023-11-21 13:49:07 -06:00 |
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Rose Thompson
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2a2d24c701
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Output the instruction trace to the logs directory.
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2023-11-21 13:47:58 -06:00 |
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Rose Thompson
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274c18976f
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Merge branch 'main' of github.com:ross144/cvw
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2023-11-21 13:46:45 -06:00 |
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Rose Thompson
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989a74b203
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Updated qemu scripts for updated linux build.
expanded memory from 128MB to 256MB.
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2023-11-21 13:46:37 -06:00 |
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Rose Thompson
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42c3555d8c
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Finally we got the wally tracer working with linux.
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2023-11-21 13:45:55 -06:00 |
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Rose Thompson
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82d53fdef9
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We are logging now.
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2023-11-21 13:02:34 -06:00 |
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Rose Thompson
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666ccc1413
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Added code to the wallyTracer to support outputing an instruction trace.
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2023-11-21 12:28:19 -06:00 |
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David Harris
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8dafab753f
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Merge pull request #494 from ross144/main
CBO simplifications
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2023-11-21 10:00:34 -08:00 |
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Rose Thompson
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0e876293a2
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-11-21 10:48:05 -06:00 |
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Rose Thompson
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17b9b17d86
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Merge branch 'main' of github.com:ross144/cvw
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2023-11-21 10:40:01 -06:00 |
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Rose Thompson
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95580d9093
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Merge pull request #493 from stineje/main
marchid approved by RISC-V
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2023-11-21 08:33:07 -08:00 |
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Rose Thompson
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a7683a48cd
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Merge pull request #492 from davidharrishmc/dev
Clean up unused signals, other cleanup
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2023-11-21 08:32:19 -08:00 |
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James E. Stine
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dfd8f2d0c1
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Update ppaAnalyze for recent update to put back parsing name
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2023-11-21 09:24:07 -06:00 |
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James E. Stine
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5c5b956b0f
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Update marchid/mvendorid for CV-Wally
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2023-11-21 09:23:02 -06:00 |
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David Harris
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d26c505a4d
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repo cleanup and start to add CMO tests
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2023-11-20 23:41:36 -08:00 |
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David Harris
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b9023af535
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Removed other unused signals from Verilog
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2023-11-20 23:37:56 -08:00 |
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David Harris
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b0f118a93a
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removed unused cache signals
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2023-11-20 23:16:35 -08:00 |
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Rose Thompson
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cababf9840
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More simplifications.
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2023-11-21 00:19:24 -06:00 |
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Rose Thompson
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25e217ee03
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More cleanup.
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2023-11-21 00:14:59 -06:00 |
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Rose Thompson
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89e62e9fee
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cleanup.
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2023-11-20 23:59:40 -06:00 |
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Rose Thompson
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2757c03c7e
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More optimizations to simplify cmo logic.
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2023-11-20 22:13:31 -06:00 |
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Rose Thompson
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60c79ea88c
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Removed the CMO_WRITEBACK state from the cache and unused signals.
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2023-11-20 20:56:30 -06:00 |
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Rose Thompson
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75c5510216
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Removed the CMO_WRITEBACK state from the cache.
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2023-11-20 20:52:11 -06:00 |
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Rose Thompson
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b75bb5ab02
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Simplified CMO.Zero fsm implementation slightly.
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2023-11-20 17:01:43 -06:00 |
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David Harris
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f7fb30573f
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Merge pull request #491 from ross144/main
Running ImperasDV Linux is upto date
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2023-11-20 10:28:05 -08:00 |
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Rose Thompson
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7d467462d4
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Merge branch 'main' of github.com:ross144/cvw
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2023-11-20 11:29:45 -06:00 |
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Rose Thompson
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d4865505b4
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Finally have the cbo way muxing controls reduced to something sane.
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2023-11-20 11:28:03 -06:00 |
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Rose Thompson
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199a84eee0
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-11-20 10:34:36 -06:00 |
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Rose Thompson
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aa6ee8ecdc
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Merge branch 'main' of github.com:ross144/cvw
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2023-11-20 10:30:42 -06:00 |
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Rose Thompson
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bc41f12195
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Modified linux imperas tests to
1. enable zicclsm
2. enable logging at 7000 ms
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2023-11-20 10:30:35 -06:00 |
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Rose Thompson
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baf9546a73
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Merge pull request #490 from davidharrishmc/dev
Synthesis running for textbook, preload IROM to avoid it being optimized out, updated M tests in risk-arch-test
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2023-11-19 20:42:29 -08:00 |
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David Harris
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65a09a81e9
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Commented IROM preloading
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2023-11-19 19:33:57 -08:00 |
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Rose Thompson
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be672a0770
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Added menvcfg to debugger for checking what linux has configured.
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2023-11-19 13:44:22 -06:00 |
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David Harris
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b549c95bfd
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-11-19 06:49:25 -08:00 |
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David Harris
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9d3da4d1da
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wallySynthAll.sh automates running all synthesis experiments without maxopt
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2023-11-19 06:49:07 -08:00 |
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David Harris
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1b9c93e07a
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Changed rv32gc to do IDIV in MDU and have k=2 copies of FDIV stages; added correct sky130 adder data; fixed feature substitution in synthesis makefile
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2023-11-18 20:56:50 -08:00 |
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David Harris
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da6151a343
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Merge pull request #489 from ross144/main
fixes issue #487
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2023-11-18 19:22:33 -08:00 |
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Rose Thompson
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e3ab0fcc0a
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Merge pull request #488 from JacobPease/main
FPGA Bootloader Preload From File
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2023-11-18 17:24:52 -08:00 |
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