8 Commits

Author	SHA1	Message	Date
Ross Thompson	559e093ab5	Fixed up FPGA constraints. ... Added back in the fpga boot rom preload.	2022-09-02 13:54:35 -05:00
Ross Thompson	077beb18dd	Constraint changes for 40Mhz wally.	2022-04-04 10:50:48 -05:00
Ross Thompson	d46bc94119	Added pin location for reset on VCU118 board. Somehow this was missing and still worked.	2022-01-25 17:48:42 -06:00
Ross Thompson	af9f97454d	Cleaned up fpga synthesis script.	2021-12-13 18:26:54 -06:00
Ross Thompson	c3c9c327b7	Fixed more constraint issues in fpga. ... Added back in the ILA. Design does not work yet. Stil having issues with order of automatic clock and I/O constraint ordering. Added back in the preload for the boottim.	2021-12-05 15:14:18 -06:00
Ross Thompson	5b4ff4526e	Fixed a bunch of fpga issues.	2021-12-03 17:47:54 -06:00
Ross Thompson	96fb3acefd	Constraints for fpga are still wrong.	2021-12-02 14:23:21 -06:00
Ross Thompson	e94fb2aaec	Got fpga synthesis running from scripts.	2021-12-01 16:59:04 -06:00