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Author SHA1 Message Date
Ross Thompson
923c00b928 I think I've solved the slow down issue. Parameters can't be mixed with cvw_t and other types. 2023-05-26 13:56:51 -05:00
Ross Thompson
8aba897386 Update top level parameterized. Simulation slowed down to 4.5 minutes. 2023-05-26 12:13:11 -05:00
Ross Thompson
d47951fb51 The privileged unit is parameterized using Lim's method. 2023-05-26 12:03:46 -05:00
Ross Thompson
dd7c7f0a39 Completed LSU parameterization based on Lim's changes. 2023-05-26 11:26:09 -05:00
Ross Thompson
0c2a54540b Subwordread now parameterized. 2023-05-26 11:22:44 -05:00
Ross Thompson
3765ebfb9f PMA checker's address decoder is now parameterized. I did not see bit slicing in Lim's code. I'm not sure how they got around this issue. 2023-05-26 11:06:48 -05:00
Ross Thompson
60bcd3d21a Progress on LSU. 2023-05-26 10:47:09 -05:00
Ross Thompson
7c364d5a77 Updated mmu's tlb and hptw to use Lim's parameterization. 2023-05-24 18:02:22 -05:00
Ross Thompson
438c955d1c PM(P/A) checkers parameterized based on Lim's work. 2023-05-24 17:20:55 -05:00
Ross Thompson
febb2442db Partial parameterization into mmu. 2023-05-24 16:12:41 -05:00
Ross Thompson
7fc53226ac MDU and hazard unit now also parameterized. Based on Lim's work. Again I want to clarify this their work. Not mine. I'm just doing this because the merge had an issue. 2023-05-24 15:01:35 -05:00
Ross Thompson
8f9151b125 More parameterization. Based on Lim's work. EBU, IFU (except bpred), and IEU done. 2023-05-24 14:56:02 -05:00
Ross Thompson
e33db7f9a7 More parameterization. Copied Lim. Still no slow down. 2023-05-24 14:49:22 -05:00
Ross Thompson
d3123fc00a Updated a large number of the source files to use parameters rather than `defines. Based on Lim's work. So far there is no simulation slow down. 2023-05-24 14:05:44 -05:00
Ross Thompson
c5aeb08e5c Trying to figure out why the parameterization slowed down modelsim so much. 2023-05-24 12:44:42 -05:00
Ross Thompson
6163fc29e1 Adds local history predictor. 
Fixes performance counters, but not coremark.
 2023-05-23 18:53:46 -05:00
Ross Thompson
2adc1c969c Fixed coremark performance counters to match the updated counter changes from a month ago. 2023-05-22 10:38:23 -05:00
Ross Thompson
1dc7fb567b Merge branch 'localhistory' 
Repair to wave file.
Created implementations of local history. Part of my Ph.D. research.
 2023-05-22 10:13:31 -05:00
Ross Thompson
c68dae0b0e Repaired wave file. 2023-05-22 10:09:33 -05:00
Ross Thompson
81b33fb48e Fixes load and store stall counters. 2023-05-22 10:08:49 -05:00
Ross Thompson
cae4448808 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-05-22 10:06:42 -05:00
Ross Thompson
0be8ec966c
Merge pull request #296 from davidharrishmc/main 
riscof fixes
 2023-05-22 11:05:34 -04:00
Ross Thompson
d57a33fb6b Repaired wave file. 2023-05-22 09:50:34 -05:00
Ross Thompson
71e5372373 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-05-22 09:38:57 -05:00
David Harris
0c73e3c85e Fixed division by zero in coremark postprocessing 2023-05-16 13:53:03 -07:00
David Harris
579a62c2d2 Update Coremark makefile 2023-05-16 13:46:20 -07:00
David Harris
d086dbffb4 Factored FMA tests out of the main 32/64 f/d tests to run in parallel and speed up sim 2023-05-16 11:37:01 -07:00
David Harris
15f721a75e Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-05-16 11:19:25 -07:00
David Harris
bdd0ab5a55 Added Zifencei ISA to tests where necessary to support new compiler 2023-05-16 11:18:27 -07:00
David Harris
63473a1477 Changed DIVN comparison from NF to NF+2. Shouldn't make a difference on our word sizes of XLEN=32/64, NF = 10/23/52) but is more proper in the general case. 2023-05-15 03:51:59 -07:00
Ross Thompson
c9ceda5794
Merge pull request #294 from davidharrishmc/main 
Defined empty RVMODEL interrupt macros to make riscof warnings go away
 2023-05-14 13:19:41 -05:00
Ross Thompson
f0268c60fb
Merge pull request #295 from davidharrishmc/dev 
Merged install script cleanup
 2023-05-14 13:19:06 -05:00
David Harris
f5db0a714d Added Zicsr and zifencei to RVTEST_ISA in custom tests where necessary to make them compile 2023-05-14 06:58:29 -07:00
David Harris
402395b126 Fixed riscof scripts that were removing zicsr from compiler misa 2023-05-14 04:19:08 -07:00
David Harris
5a8a82fe61 Commented out unnecessary text segment in test.ld that causes RWX in LOAD segment warning 2023-05-14 03:58:08 -07:00
David Harris
fe78b820f4 Merged install script cleanup 2023-05-14 03:41:35 -07:00
David Harris
c6a6269404 Defined empty RVMODEL interrupt macros to make riscof warnings go away 2023-05-14 03:36:28 -07:00
David Harris
84e7d6dbbc Added CD before compiling SAIL 2023-05-14 03:08:53 -07:00
Ross Thompson
2612ca4062 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-05-11 14:56:53 -05:00
Ross Thompson
03823a9bc1 Partially working local history repair. 2023-05-11 14:56:26 -05:00
Ross Thompson
9712a619d9
Merge pull request #293 from davidharrishmc/main 
wally installation improvements: latest main branch of riscv-arch-tes…
 2023-05-10 11:40:43 -05:00
David Harris
d4d9fa1ff6 wally installation improvements: latest main branch of riscv-arch-test, updated install script 2023-05-10 08:23:55 -07:00
David Harris
4b0b7f0aaf
Update README.md 2023-05-09 10:58:45 -07:00
Ross Thompson
69acd43263
Merge pull request #292 from davidharrishmc/dev 
Added packages requested for gcc
 2023-05-09 12:41:06 -05:00
David Harris
be7bc4c9ea Added packages requested for gcc 2023-05-09 10:30:02 -07:00
David Harris
988ae68c94
Merge pull request #291 from kjprime/main 
Add comments tlbGBL and minor optimization
 2023-05-06 09:11:34 -07:00
Ross Thompson
e34b25511a Baseline localhistory with speculative repair built. 2023-05-05 15:23:45 -05:00
Kevin Thomas
968c228fcc Comment tlbGBL more discriptively 
Reduce redundant instructions
 2023-05-04 19:13:47 -05:00
Ross Thompson
faf71294d6 Fixed bug in local history predictor. 2023-05-04 16:54:41 -05:00
Ross Thompson
e11d42b270 Almost working ahead pipelined local history predictor. 2023-05-04 16:17:31 -05:00