Noah Boorstin
394b79b5de
add rv32ic regression test
2021-03-11 12:40:29 -05:00
Noah Boorstin
54fa16d783
test regression script: parallalize better
2021-03-11 12:25:20 -05:00
Noah Boorstin
aba54659bf
test regression script: try adding verilator checking also
2021-03-11 07:32:31 +00:00
Noah Boorstin
81c14f899d
try adding delays to test regression script
2021-03-11 06:59:50 +00:00
Noah Boorstin
1093b07670
this is just a test for now, try to reimplement regression-wally in bash
2021-03-11 06:45:45 +00:00
Noah Boorstin
a8b242a6ef
busybear: account for CSR moving
2021-03-11 06:45:14 +00:00
Thomas Fleming
f47728c6e3
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-03-11 00:47:24 -05:00
David Harris
eaef379454
Drafted AMO tests
2021-03-11 00:42:13 -05:00
Thomas Fleming
1294235837
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
...
Conflicts:
wally-pipelined/src/ebu/ahblite.sv
2021-03-11 00:15:58 -05:00
David Harris
42275e92ed
Initial untested implementation of AMO instructions
2021-03-11 00:11:31 -05:00
Jarred Allen
4757794887
Return testbench to normal
2021-03-10 22:58:41 -05:00
Ross Thompson
845115302e
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-03-10 15:37:02 -06:00
Ross Thompson
f92f766573
Added debug option to disable the function radix if not needed.
...
Function radix slows the simulation by 70 to 76 s (8.5%) for the rv64i tests.
2021-03-10 15:17:02 -06:00
Ross Thompson
dcae90e3ad
I finally think I got the function radix debugger working across both 32 and 64 bit applications.
2021-03-10 14:43:44 -06:00
Noah Boorstin
2c25e270a2
change flop in ahb controller to use normal flop module
2021-03-10 19:14:02 +00:00
Ross Thompson
50a92247b3
Finally I think I have the function radix mapping across all applications correctly. I still need to clean up the code a bit so it is easier to understand.
2021-03-10 11:00:51 -06:00
Jarred Allen
ae9bcc174d
Merge upstream changes
2021-03-09 21:20:34 -05:00
Jarred Allen
3172be3039
More progress
2021-03-09 21:16:07 -05:00
David Harris
c2f340681d
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-03-09 09:28:32 -05:00
David Harris
17c0f9629a
WALLY-LRSC atomic test passing
2021-03-09 09:28:25 -05:00
Noah Boorstin
4a8b689f62
busybear: better NOPing out of float instructions
2021-03-08 21:24:19 +00:00
Noah Boorstin
c780a25f92
busybear: better instrF checking
...
So this now checks instrF only when StallD is low. @kaveh I'd love your
opinion on this. I don't know if this is a good idea or not. Ideally we
should probably be checking InstrRawD instead, but I kind of want to stay
checking the instr in the F stage instead of D for now. Idk if this is worth
staying in F, I can't really see any big downsides to checking the instruction in
D except that PCD isn't an external signal, but neither is StallD, so.....
Anyway I'd love others' thoughts on this
2021-03-08 19:48:12 +00:00
Noah Boorstin
1b206d5a3c
busybear: make a second .do file with better optimization for command line mode
2021-03-08 19:35:00 +00:00
Noah Boorstin
93c9c57426
busybear: load mem files from verilog instead of .do
2021-03-08 19:26:26 +00:00
David Harris
9c7da510fb
Created atomic test vector and directories
2021-03-08 09:38:55 -05:00
Ross Thompson
d5f151eb0f
Updated the paths to the branch predictor memory preloads for busy bear.
2021-03-05 15:36:00 -06:00
Ross Thompson
87ed6d510c
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-03-05 15:27:22 -06:00
Ross Thompson
301166d062
Oups. I forgot to update other do files with the commands to preload the branch predictor memories.
2021-03-05 15:23:53 -06:00
Thomas Fleming
2b891196d9
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-03-05 16:20:53 -05:00
Noah Boorstin
3c5be59e9b
busybear: add branch preditor loading to do file
...
(sorry to add more loading to the do instead of less)
2021-03-05 21:01:41 +00:00
Thomas Fleming
be6ee84d87
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-03-05 15:46:51 -05:00
Noah Boorstin
86142e764a
Merge branch 'main' into busybear
2021-03-05 20:27:19 +00:00
Noah Boorstin
889d2c0b85
fix wally-pipelined-batch.do to match wally-pipelined.do
2021-03-05 20:27:01 +00:00
bbracker
850a2e9329
added a delay to sel signals
2021-03-05 15:07:34 -05:00
bbracker
77e2e357a7
more merging fixes
2021-03-05 14:36:07 -05:00
bbracker
ed4ff1ecd0
remove deprecated mem signals
2021-03-05 14:27:38 -05:00
bbracker
19fc7d2381
refactored sim file
2021-03-05 14:25:16 -05:00
bbracker
0f4a231543
first merge of ahb fix
2021-03-05 14:24:22 -05:00
Noah Boorstin
1a11b60664
busybear: slight testbench update
2021-03-05 19:00:40 +00:00
Thomas Fleming
2e2eb5839f
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-03-05 13:35:44 -05:00
Thomas Fleming
8c97143be6
Place tlb parameters into constant header file
2021-03-05 13:35:24 -05:00
Thomas Fleming
7e11317a2d
Export SATP_REGW from csrs to MMU modules
2021-03-05 01:22:53 -05:00
Noah Boorstin
f48af209c4
busybear: make CSRs only weird for us
2021-03-05 00:46:32 +00:00
Noah Boorstin
5a3ba1174e
busybear: better implenetation of sim-busybear-batch
2021-03-05 00:39:03 +00:00
Ross Thompson
a662aa487c
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-03-04 17:31:27 -06:00
Ross Thompson
264480f258
updated the function radix to look at wally signals.
2021-03-04 17:31:12 -06:00
Jarred Allen
41f682f848
Partial progress towards compressed instructions
2021-03-04 18:30:26 -05:00
Noah Boorstin
dfae278ffb
busybear: make imperas tests work again
2021-03-04 22:44:49 +00:00
Katherine Parry
cfac6bf0c7
fixed various bugs
2021-03-04 22:20:39 +00:00
Katherine Parry
09564f1c77
fixed various bugs
2021-03-04 22:20:28 +00:00
