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Author SHA1 Message Date
Ross Thompson
8d1a7154c2
Merge pull request #138 from eroom1966/main 
Fix MISA RO and UART addresses
 2023-03-13 23:32:56 -05:00
eroom1966
0d260accb4 Fix MISA RO and UART addresses 
It appears on inspection that the MISA register is read only in Wally
In which case this has now also been set in the ImperasDV representation
Also the Addresss for the UART R/W privileges are corrected
 2023-03-13 11:07:19 +00:00
Ross Thompson
23f6d58247
Merge pull request #137 from davidharrishmc/dev 
Fixes to wally-batch for coverage
 2023-03-10 15:36:24 -06:00
David Harris
a1ffff57ba Fixes to wally-batch for coverage 2023-03-10 13:33:32 -08:00
Ross Thompson
501bec511c
Merge pull request #136 from davidharrishmc/dev 
Bug fix in wally-regression
 2023-03-10 15:11:25 -06:00
David Harris
8107f585c8 Fixed crash with wrong number of arguments for coverage in regression-wally 2023-03-10 13:10:28 -08:00
David Harris
ed22433916 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-10 12:47:30 -08:00
David Harris
2db97d20fa Removed unneeded echo from setup 2023-03-10 12:08:24 -08:00
David Harris
2527930409
Merge pull request #135 from eroom1966/main 
Enhancements to support the PMA ranges
 2023-03-10 06:13:33 -08:00
eroom1966
8e657c335e Enhancements to support the PMA ranges 2023-03-10 14:09:22 +00:00
David Harris
c44a3ac8a6
Merge pull request #134 from ross144/main 
Updated testbench to report performance coutners for coremark.
 2023-03-09 16:09:03 -08:00
David Harris
a3691cc5f7 Modified regression and wally-batch.do to support -coverage 2023-03-09 15:59:57 -08:00
David Harris
06b99035d4 Modified setup to add Imperas/scripts/cvw to path 2023-03-09 15:59:28 -08:00
David Harris
2614448218 Simplified SLT and SLTU code in ALU 2023-03-09 15:14:52 -08:00
Ross Thompson
fa8a550e12 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-09 13:29:38 -06:00
Ross Thompson
6d2d7d181e Updated testbench to record coremark performance counters. 
Added comment about mtval probably not being correct for compressed instructions.
 2023-03-08 17:11:27 -06:00
David Harris
9a6514f20d Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-08 10:37:28 -08:00
David Harris
6c14d30dd7
Merge pull request #133 from eroom1966/main 
Add support for setting PMP registers + Async DV
 2023-03-08 05:17:45 -08:00
eroom1966
68f3e31547 Add support for setting PMP registers 
Add support for async DV
 2023-03-08 12:44:53 +00:00
David Harris
ec0873ff16 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-07 14:49:23 -08:00
David Harris
bbcb9c7354
Merge pull request #127 from kipmacsaigoren/priv-tests 
Added full testing support for S time interrupts
 2023-03-07 14:49:12 -08:00
kipmacsaigoren
01f78835cb
Merge branch 'openhwgroup:main' into priv-tests 2023-03-07 13:46:55 -08:00
David Harris
91f2b39a45
Merge pull request #130 from ross144/main 
change signal names to match book.
 2023-03-07 09:38:35 -08:00
Ross Thompson
fc9081b64c Added Yujun Lin's branch predictor simulator. This is a C baseline module for common branch predictor algorithms. 2023-03-07 10:49:59 -06:00
David Harris
b041606bb1 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-07 06:31:44 -08:00
David Harris
dce6d33531 editorconfig to specify tabs/spaces. Fixed some tabs. Turn off coverage to speed up simulation 2023-03-07 06:31:40 -08:00
Ross Thompson
17f80285ca Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-06 22:29:27 -06:00
Ross Thompson
5528df8630
Merge pull request #129 from davidharrishmc/dev 
Further illegal instruction detection
 2023-03-06 22:29:11 -06:00
Ross Thompson
b8dca927f2 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-06 18:39:15 -06:00
Ross Thompson
4b539de184 Renamed signals to be consistent with textbook. 2023-03-06 18:29:31 -06:00
Ross Thompson
6fc157e628 Renamed PCFSpill to PCSpillF. 2023-03-06 17:50:57 -06:00
Ross Thompson
e831efddaf Renamed InstrFirstHalf to InstrFirstHalfF. 2023-03-06 17:48:57 -06:00
Ross Thompson
82ada79b11 Renamed ebuarbfsm to ebufsmarb to match figures. 2023-03-06 17:47:55 -06:00
David Harris
4fd461e520 Fixed bug about rv64 shifts only using 6 bits of funct7 2023-03-06 13:10:51 -08:00
David Harris
94dd39795e Simplified decoder default to illegal instruction 2023-03-06 11:21:11 -08:00
David Harris
08f1ed8e53 More detailed decoding of load/store/branch/jump 2023-03-06 11:15:48 -08:00
Ross Thompson
fe163bbab3 Updated fpga ila script. 2023-03-06 13:14:48 -06:00
Ross Thompson
633eaf90c8
Merge pull request #128 from davidharrishmc/dev 
Detecting illegal instructions with controller
 2023-03-06 13:10:31 -06:00
David Harris
583b8ed91e Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-06 11:02:48 -08:00
David Harris
a01e0bd318 Improved decoding illegal instructions in controller 2023-03-06 11:02:42 -08:00
Ross Thompson
22367e4c20 Working batch mode branch prediction simulations. 2023-03-04 17:59:16 -06:00
Kip Macsai-Goren
5c3f5fe8c6 added in the CSR name for stimecmp(h) 2023-03-04 15:53:03 -08:00
Kip Macsai-Goren
4fa78a02b7 removed changes to counteren from stimecmp tests 2023-03-04 15:46:57 -08:00
Kip Macsai-Goren
98ec8d7213 added S time compare to gc configs 2023-03-04 15:46:26 -08:00
Ross Thompson
00baa06234 Mostly working bpred launch script. 2023-03-04 17:20:45 -06:00
Ross Thompson
9c4a69bb0e Partial automation of branch predictor embenching. 2023-03-04 17:10:58 -06:00
Kip Macsai-Goren
0ba1a59a70 added reset values to stime and stimecmp registers 2023-03-04 15:06:15 -08:00
Kip Macsai-Goren
da9627708e Added correct causing and handling of S time interrupts to test suite. 2023-03-04 15:04:17 -08:00
Ross Thompson
f13017a927 Updated parsing script. 2023-03-04 13:45:15 -06:00
David Harris
e300c13466 Removed unneeded diagnostic print 2023-03-03 16:46:16 -08:00