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Author SHA1 Message Date
David Harris
7f174310b9 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-06-02 20:48:34 +00:00
David Harris
08714ca53f mulAdd tests in gitignore 2022-06-02 20:48:14 +00:00
slmnemo
b35824eadd Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-06-02 12:54:08 -07:00
Katherine Parry
ccda4c771e fpu paramaterized - except fdivsqrt 2022-06-02 19:50:28 +00:00
slmnemo
568b83a647 Revert "parametrized linux testbench's DEBUG_TRACE and added parameters to relevant calls of the linux testbench in wally-pipelined.do" 
This reverts commit 7d2bfb6db8.
 2022-06-02 12:45:21 -07:00
slmnemo
40abe59d33 Revert "Fixed buildroot by adding a second ." 
This reverts commit 0982417054.
 2022-06-02 12:43:59 -07:00
slmnemo
581c950193 Revert "Added parameter to keep tracking on for buildroot and buildroot-checkpoint in regression.py" 
This reverts commit 05d14bdb3c.
 2022-06-02 12:41:01 -07:00
slmnemo
74319c2af6 Revert "Added parameters for DEBUG_TRACE to buildroot, buildroot-checkpoint, and buildroot-notrace" 
This reverts commit a5490c7096.
 2022-06-02 12:40:46 -07:00
David Harris
9065b684f8 Added stalls for pending SFENCE.VMA and FENCE.I in hazard unit 2022-06-02 09:37:59 -07:00
David Harris
62865d9398 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-06-02 15:48:36 +00:00
David Harris
7cf5d481c0 Cleaned up comments in controller 2022-06-02 15:48:33 +00:00
David Harris
9cd6b309b4 Cleaned up test cases in testbench 2022-06-02 08:44:28 -07:00
David Harris
129fab3794 Provided sfencevmaM to hazard unit and renamed TLBFlush signals to sfencevma going into LSU/IFU. Preparing for SFENCE.VMA to flush the pipeline, but that is not yet working. 2022-06-02 14:18:55 +00:00
slmnemo
61f077f62c Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-06-02 02:52:03 +00:00
slmnemo
35caa03e46 Updated Linux testbench to use new force/unforce method for Branch predictor init and removed related .txt files 2022-06-02 02:51:51 +00:00
Katherine Parry
74b549ddc8 paramerterized some small fma units 2022-06-01 23:34:29 +00:00
Madeleine Masser-Frye
f550fdb7e7 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-06-01 21:02:55 +00:00
Madeleine Masser-Frye
9970654e56 fixed errors in synth.out by switching ( to { 2022-06-01 21:02:49 +00:00
DTowersM
4fbce9fc45 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-06-01 21:00:51 +00:00
DTowersM
d3c8ee7154 added support for embench post processing to testbench.sv 2022-06-01 21:00:44 +00:00
DTowersM
9e4f17fed9 some changes to further support vsim on embench 2022-06-01 17:19:19 +00:00
Katherine Parry
707067548f unpacker optimizations 2022-06-01 16:52:21 +00:00
cturek
e3a0ee333f Fixed typos 2022-06-01 00:07:36 +00:00
David Harris
efe4b3e8fe Unpackinput cleanup 2022-05-31 22:31:21 +00:00
David Harris
99da6537cc Removed normalized output from unpack and simplified interface 2022-05-31 21:32:31 +00:00
David Harris
79df271a6f Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-05-31 21:12:45 +00:00
David Harris
31815422d2 ../src/privileged/csrc.sv 2022-05-31 21:12:17 +00:00
DTowersM
f7491e8445 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-05-31 20:13:41 +00:00
DTowersM
2088c0cd7c added testbench.sv support for embench tests, test output still WIP 2022-05-31 20:13:32 +00:00
DTowersM
abb6ba97cf removed delapidated signals SIE_REGW SIP_REGW TimerIntM SwIntM 2022-05-31 20:10:56 +00:00
DTowersM
ea07588999 added embench tests to tests.vh 2022-05-31 20:08:04 +00:00
DTowersM
4bbacd3742 dummy start trigger and stop trigger support for make file 2022-05-31 20:05:51 +00:00
Katherine Parry
cd7fe9af61 reorginized unpackinput signals 2022-05-31 17:40:34 +00:00
Katherine Parry
559c0c278e added unpackinput.sv 2022-05-31 16:18:50 +00:00
David Harris
8b493e16f5 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-05-31 14:58:18 +00:00
David Harris
2935188035 Moved delegation logic from privmode to trap to simplify interface 2022-05-31 14:58:11 +00:00
Madeleine Masser-Frye
8510474174 plots saved to synthDC/plots instead of shown 2022-05-30 19:56:47 +00:00
Madeleine Masser-Frye
d5e0eb9eb4 added optimized area plotting 2022-05-30 18:54:02 +00:00
David Harris
d1ef3b8981 Removed unused fp add and convert modules 2022-05-29 23:07:56 +00:00
Katherine Parry
835a4e4606 fixed lint error 2022-05-28 10:20:13 -07:00
slmnemo
3b9ae58f59 Reverted commit 9b55e9da38 2022-05-28 04:00:01 -07:00
slmnemo
2f3689063a Revert Commit 61ebf68939 2022-05-28 03:35:17 -07:00
slmnemo
9b55e9da38 Changed NO_IE_MTIME_CHECKPOINT so it uses the new parameter name 2022-05-28 03:16:55 -07:00
slmnemo
61ebf68939 Deparametrized Linux testbench and removed mentions of parameters in wally-pipelined.do 2022-05-28 03:14:49 -07:00
David Harris
80315fedff fixed merge conflicts 2022-05-28 09:44:55 +00:00
David Harris
4335895b21 Added comments to some files, added a+b = 0 detector to comparator.sv 2022-05-28 09:41:48 +00:00
Madeleine Masser-Frye
4ed7283ad1 fixed normalization vertical axes, added TechSpecs type 2022-05-28 04:57:18 +00:00
Katherine Parry
822866fd0a removed unused signal from FMA 2022-05-27 16:47:56 -07:00
Katherine Parry
892ed38b6d Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-05-27 14:37:34 -07:00
Katherine Parry
d5c249bf71 unpacker adds 1 to denorm expoents 2022-05-27 14:37:10 -07:00