Rose Thompson
cdd21d6635
Added menvcfg to debugger for checking what linux has configured.
2023-11-19 13:44:22 -06:00
Rose Thompson
1c54a5698b
Modified the device trees to include all the minor extensions.
2023-11-14 13:54:16 -06:00
Rose Thompson
6b7ff50a84
Reduced Arty A7 clock speed to 20Mhz to support Zicclsm.
2023-11-13 16:44:02 -06:00
Rose Thompson
13908ac41c
Updated buildroot to use kernel 6.6 and added dedicated qemu emulation script.
2023-11-13 12:36:32 -06:00
Ross Thompson
3156d5abab
Somehow the arty A7 was missing the update for the console baud rate setting.
2023-10-03 17:37:13 -05:00
Jacob Pease
dd835e2a33
Merge branch 'main' of github.com:openhwgroup/cvw
2023-08-29 14:53:02 -05:00
Jacob Pease
8a62a45137
Set default baud rate of serial output to 115200 for the VCU108.
2023-08-25 17:44:06 -05:00
Ross Thompson
055e00b8ac
Pushed vcu118 to 71MHz.
2023-08-25 17:04:50 -05:00
Ross Thompson
fcf9adae8c
Merge branch 'main' of github.com:ross144/cvw
2023-08-02 16:51:42 -05:00
Ross Thompson
cab40e618f
Updateds to vcu118 constraints and device tree.
2023-08-02 16:51:32 -05:00
Ross Thompson
2a0b307608
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-08-01 11:04:26 -05:00
Ross Thompson
06efd2cdde
Pushed performance of arty a7 to 23Mhz.
2023-07-31 14:13:09 -05:00
Jacob Pease
55055aa0a8
Updated VCU108 device tree for 256MB memory.
2023-07-27 17:44:31 -05:00
Ross Thompson
dbf9e5da0b
Updated Arty A7 fpga config and device tree to 256MiB main memory.
2023-07-25 15:11:47 -05:00
Ross Thompson
e99c6e5e1d
Updated arty a7 device clock speed for 20Mhz.
2023-07-24 11:50:00 -05:00
Ross Thompson
49b87d4550
Merge branch 'main' of github.com:ross144/cvw
2023-07-24 10:47:05 -05:00
Ross Thompson
065e5e98c9
Improved timing constraints for arty a7 to push clock speed to 20Mhz.
2023-07-24 10:46:49 -05:00
Ross Thompson
481f27e3fe
Updated arty a7 device tree.
2023-07-21 19:08:45 -05:00
Ross Thompson
a89a1e675c
Merge branch 'boot' into mergeBoot
...
Merges Jacob's new sdc controller into wally.
2023-07-21 17:43:45 -05:00
Ross Thompson
d04d2afed2
Modified the LSU/IFU and caches to improve critical path. Arty A7 went from 15 to 17Mhz. I believe we can push all the way to 20+Mhz with relatively little effort. Along the way I'm fixing up the scripts build the linux images for the flash card.
2023-07-21 13:06:27 -05:00
Ross Thompson
d1ea52f6ea
Added artya7 device tree.
2023-07-17 16:01:02 -05:00
Jacob Pease
b3aaa87cba
Modified bootloader to access GUID partitions. SDC interrupt to PLIC.
...
Since writing an SD card image generation script, the bootloader
needed to be altered to access individual binaries from specific
partitions. A new file, gpt.c with it's header gpt.h, have been added
to the bootloader to facilitate this.
The SDC has been added to the device tree for the VCU108
board. Additionally the SDC interrupt signal was added to the PLIC
node in the device tree. The PLIC itself was modified to accept the
SDC interrupt signal.
2023-07-14 13:36:44 -05:00
Ross Thompson
cf00f85456
Updated vcu118 constraints to run cpu at 38.43Mhz.
2022-11-15 10:19:38 -06:00
Ross Thompson
cc80f1f7b2
Bumped DDR4 clock speed up from 832Mhz (1666 MT/s) to 1200 Mhz (2400 MT/s).
...
Increased CPU clock speed from 30 Mhz to 35 Mhz.
2022-11-11 15:33:03 -06:00
Ross Thompson
d58a862f59
Added new device trees for vcu118 and vcu108 boards.
2022-10-24 17:45:10 -05:00
Ross Thompson
897982400c
Updated the device tree to use 30Mhz instead of 10Mhz for the cpu timebase.
2022-10-20 15:05:39 -05:00
bbracker
3dcb87473b
change devicetree to expect only 128MB of RAM
2022-03-27 15:11:36 -07:00
bbracker
05dd37d3d6
rename dump-dts debug script
2022-02-10 00:10:09 +00:00
bbracker
f823338597
continue to rename devicetree to wally-virt
2022-02-10 00:08:28 +00:00
bbracker
62d1ed65d4
rename devicetree to wally-virt
2022-02-10 00:07:29 +00:00
bbracker
b165fe3937
add trimmed-down virt devicetree to repo for QEMU
2022-02-08 11:11:44 +00:00
