Kip Macsai-Goren
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7d9ebf56ed
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renamed virt mem tests to include svadu
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2023-04-11 18:46:37 -07:00 |
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Kip Macsai-Goren
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cf50d04a21
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removed unnecessary 'deadbeef's at the end of reference outputs
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2023-04-11 18:32:04 -07:00 |
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Kip Macsai-Goren
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b839de4451
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Modified virt mem tests to do correct r/w when svadu is enabled
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2023-04-11 18:08:30 -07:00 |
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Kip Macsai-Goren
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599ebc572e
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enabled SVADU for rv32/64gc
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2023-04-11 17:42:26 -07:00 |
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Kip Macsai-Goren
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c179d76542
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Removed Trap outputs from writes covered by SVADU
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2023-04-11 17:41:57 -07:00 |
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Kip Macsai-Goren
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41ef59ddfe
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Removed Sail from virt mem tests due to sail not recognizing SVADU
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2023-04-11 17:41:31 -07:00 |
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Kip Macsai-Goren
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4bf2a7e15b
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Added sail simulation to priv tests that support it
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2023-04-11 13:26:59 -07:00 |
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David Harris
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4797f6ca5e
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Merge pull request #230 from ACWright256/main
Excluded coverage for misaligned instructions
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2023-04-11 05:21:09 -07:00 |
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Alexa Wright
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34fd402f23
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Excluded coverage for misaligned instructions
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2023-04-10 23:18:25 -07:00 |
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David Harris
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a819a24b83
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Merge pull request #226 from SydRiley/main
Increased coverage for the fpu by adding directed tests to toggle signals
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2023-04-09 21:52:11 -07:00 |
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David Harris
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df96732683
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Merge pull request #223 from ross144/main
Solves issue 172
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2023-04-09 20:30:26 -07:00 |
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David Harris
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2e97aa46db
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Merge pull request #224 from kbox13/my-single-change
Create new PMP tests
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2023-04-09 20:29:03 -07:00 |
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Kevin Box
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f74bb8b38e
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Create new pmp tests
configures all pmpcfg registers in each different address range.
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2023-04-09 16:29:57 -07:00 |
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Sydeny
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ff405a49a5
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Increasing coverage for the fpu by adding directed tests to toggle signals
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2023-04-09 13:33:12 -07:00 |
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Ross Thompson
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d67ee33896
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Updated wally figure again to increase resolution.
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2023-04-09 12:26:15 -05:00 |
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Ross Thompson
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f6c84b1e8d
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Updated wally top level figure to fix issue 172.
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2023-04-09 12:20:43 -05:00 |
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Ross Thompson
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132016f131
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Merge branch 'main' of https://github.com/openhwgroup/cvw into main
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2023-04-09 12:19:44 -05:00 |
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David Harris
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11cadb3f8f
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Merge pull request #222 from kjprime/main
Remove unnecessary check from compressed instruction decode
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2023-04-09 04:56:21 -07:00 |
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David Harris
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c8cd2ffc77
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Merge pull request #221 from dherreravicioso/main
Added test coverage for Privilege Unit in CSRs
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2023-04-09 04:54:36 -07:00 |
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Kevin Thomas
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640310cf94
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-04-08 22:56:20 -05:00 |
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Diego Herrera Vicioso
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76d5c3e500
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Added test coverage for floating point registers, some PMP addresses, as well as MTVAL and MCAUSE CSRs.
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2023-04-08 16:40:36 -07:00 |
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Ross Thompson
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e79119e2fd
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Merge pull request #220 from davidharrishmc/dev
Obscure coverage fixes
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2023-04-08 10:27:31 -05:00 |
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David Harris
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d27779f4c0
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-04-07 21:57:18 -07:00 |
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David Harris
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4a2f641348
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Waived coverage on BTB memory with byte write enables tied high
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2023-04-07 21:56:49 -07:00 |
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David Harris
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495f2ed274
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Improved RAS predictor coverage by eliminating unreachable StallM term
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2023-04-07 21:37:12 -07:00 |
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Ross Thompson
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a36a8ef6f5
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Merge pull request #219 from davidharrishmc/dev
Spill logic coverage and fdivsqrt cleanup
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2023-04-07 23:30:52 -05:00 |
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David Harris
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5119222c2f
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Commented WFI non-flush in writeback stage of hazard unit
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2023-04-07 21:27:13 -07:00 |
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David Harris
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a9b7bd101e
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Added vm64check tests to cover IMMU vm64
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2023-04-07 21:14:52 -07:00 |
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David Harris
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25f394ce97
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Fixed csrwrites.S to agree with ImperasDV. Now coverage tests pass iter-elf
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2023-04-07 21:11:01 -07:00 |
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David Harris
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5c6d9f87a0
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Fixed priv.S to initialize stimecmp and agree with ImperasDV
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2023-04-07 20:44:01 -07:00 |
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David Harris
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7ad8d7f774
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Bug fix: MTIME & MTIMEH registers are unimplemented and should fault when accessed
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2023-04-07 20:43:28 -07:00 |
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David Harris
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8b4016582b
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Fixed WALLY-init-lib to return correctly even from traps from compressed instructions
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2023-04-07 20:24:33 -07:00 |
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David Harris
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982ade31c5
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Fixed enabling machine timer interrupt
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2023-04-06 22:18:33 -07:00 |
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David Harris
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c9887cb182
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vm64 tests
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2023-04-06 21:42:47 -07:00 |
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David Harris
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c24e81c57f
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Division cleanup
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2023-04-06 21:42:34 -07:00 |
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David Harris
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ce931d1fc5
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Simplified integer division preprocessing in fdivsqrt
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2023-04-06 16:43:28 -07:00 |
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David Harris
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f810ad3cec
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-04-06 14:07:59 -07:00 |
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David Harris
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1569bfbb98
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Removed redundant stall signal to get spill coverage
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2023-04-06 14:07:50 -07:00 |
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Ross Thompson
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87a1d12c3b
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Merge branch 'main' of github.com:ross144/cvw
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2023-04-06 15:33:24 -05:00 |
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Ross Thompson
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b57566e632
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Added Jacob's ILA script.
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2023-04-06 15:32:36 -05:00 |
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Ross Thompson
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fe922c8fac
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Fixed syntax error.
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2023-04-06 15:10:55 -05:00 |
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Ross Thompson
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270b3371f1
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Added note about strange vivado behavior not inferring block ram.
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2023-04-06 15:09:35 -05:00 |
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Ross Thompson
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d121364997
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Similifed the no byte write enabled version of the sram model.
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2023-04-06 14:18:41 -05:00 |
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Kevin Thomas
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1931859c45
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-04-06 12:38:41 -05:00 |
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David Harris
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fddbd79209
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Update dvtestplan.md
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2023-04-06 09:29:47 -07:00 |
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David Harris
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6431e358ca
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Create dvtestplan.md
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2023-04-06 09:23:09 -07:00 |
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David Harris
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4448c238c4
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Merge pull request #214 from eroom1966/main
Add in configuration for B extension
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2023-04-06 09:08:20 -07:00 |
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Lee Moore
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a20528e43c
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Merge branch 'openhwgroup:main' into main
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2023-04-06 16:31:49 +01:00 |
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eroom1966
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430763a1d1
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add support into configuration for Zb(a,b,c,s)
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2023-04-06 16:30:14 +01:00 |
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David Harris
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2a3711546f
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Merge pull request #213 from eroom1966/main
fix break to simulation testbench
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2023-04-06 06:54:59 -07:00 |
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