David Harris
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7d8a0d9615
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Refactored setup QUESTA and SNPS paths, and removed troublesome bit manipulation test cases
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2023-01-23 05:00:11 -08:00 |
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David Harris
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b173112f86
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Continued framework for B instructions
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2023-01-20 14:27:13 -08:00 |
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David Harris
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ca949f2110
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Only delegated bits of SIP are readable
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2022-12-21 12:32:49 -08:00 |
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David Harris
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00ff823d84
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Restored rv32d arch test after new push
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2022-12-20 10:56:33 -08:00 |
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David Harris
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643a2e7cf9
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Use FPU divider for integer division when F is supported
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2022-12-14 17:03:13 -08:00 |
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Ross Thompson
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fc05e27416
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Updated riscv arch test removed misaligned1.
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2022-12-04 00:18:10 +00:00 |
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David Harris
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898dbc8e74
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Completed PLIC-S tests. Regression working. This completes peripheral tests.
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2022-08-03 09:33:56 -07:00 |
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David Harris
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75a265159b
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Increased timeout threshold to avoid timeout building riscof tests on slow machine
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2022-07-27 04:05:21 +00:00 |
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David Harris
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2d7f4b133c
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More work toward riscof tests
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2022-07-26 06:19:13 -07:00 |
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David Harris
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c6a58eb5b6
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Tests making successfully except for rv32gc_arch32f, which has FLEN=64 and tries using fld/fsd
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2022-07-25 16:23:10 -07:00 |
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David Harris
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416f5edfe0
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More riscof makefile tuning
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2022-07-25 21:15:56 +00:00 |
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David Harris
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7f7b3359b0
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Cleaning up Makefiles for riscof to run each set of tests individually and eliminate warnings
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2022-07-25 20:50:38 +00:00 |
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Daniel Torres
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d0aaae26fe
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fixed wally rv32e tests, updated regression makefile to new testflow
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2022-07-22 17:09:46 -07:00 |
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Daniel Torres
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0e75142ef4
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-07-22 11:16:09 -07:00 |
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Daniel Torres
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95fdd408ee
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commiting current changes to riscof wally tests
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2022-07-22 11:14:04 -07:00 |
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Daniel Torres
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8dcb794bbb
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added support for new version of riscof and arch tests, now supports tests that can be compiled for both rv32 and rv64
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2022-07-21 20:58:58 -07:00 |
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Daniel Torres
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635a02cf6a
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made makefile more specific, just incase future additions
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2022-07-21 12:50:02 -07:00 |
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Daniel Torres
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a8faddf81f
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removed ugly /ref/Ref from tests.vh, added back d_fsd-align-01.S and d_fld-align-01.S tests to tests.vh, updated makefile to fix the riscof issues and fix fld fsd tests, updated testbench.sv for comptability with changes
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2022-07-21 12:47:51 -07:00 |
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Daniel Torres
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4883bbb952
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-07-18 12:13:48 -07:00 |
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Daniel Torres
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6a77ada908
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added the sail change to spike to let it all run normally
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2022-07-18 12:13:15 -07:00 |
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Katherine Parry
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ac2ad1d60a
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fixed uncommented line in makefile
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2022-07-14 00:01:07 +00:00 |
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Katherine Parry
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12a54161c0
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found the bug in the store modification
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2022-07-12 22:42:19 +00:00 |
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Katherine Parry
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97e7e619d9
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moved fpu ieu write data mux to lsu
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2022-07-08 23:56:57 +00:00 |
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slmnemo
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0a774d9bf3
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Fixed make error
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2022-07-01 16:28:29 -07:00 |
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Daniel Torres
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2ae22ac6cb
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added changes to testbench, tests and riscof for additional riscof compatability
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2022-06-29 12:23:40 -07:00 |
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Daniel Torres
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1d4c543f71
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arch tests now run on spike and sail and compare signatures during build
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2022-06-17 20:53:15 -07:00 |
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Daniel Torres
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0ede7c412e
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removed old code from makefile, simplified code in testbench
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2022-06-17 15:13:38 -07:00 |
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Daniel Torres
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475220a5ff
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arch bug fixes and testbench changes
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2022-06-17 15:07:16 -07:00 |
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Daniel Torres
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83cce676a0
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added files needed for arch to build
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2022-06-16 18:05:06 -07:00 |
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