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584 Commits

Author SHA1 Message Date
Ross Thompson
7c364d5a77 Updated mmu's tlb and hptw to use Lim's parameterization. 2023-05-24 18:02:22 -05:00
Ross Thompson
438c955d1c PM(P/A) checkers parameterized based on Lim's work. 2023-05-24 17:20:55 -05:00
Ross Thompson
febb2442db Partial parameterization into mmu. 2023-05-24 16:12:41 -05:00
Ross Thompson
7fc53226ac MDU and hazard unit now also parameterized. Based on Lim's work. Again I want to clarify this their work. Not mine. I'm just doing this because the merge had an issue. 2023-05-24 15:01:35 -05:00
Ross Thompson
8f9151b125 More parameterization. Based on Lim's work. EBU, IFU (except bpred), and IEU done. 2023-05-24 14:56:02 -05:00
Ross Thompson
e33db7f9a7 More parameterization. Copied Lim. Still no slow down. 2023-05-24 14:49:22 -05:00
Ross Thompson
d3123fc00a Updated a large number of the source files to use parameters rather than `defines. Based on Lim's work. So far there is no simulation slow down. 2023-05-24 14:05:44 -05:00
Ross Thompson
c5aeb08e5c Trying to figure out why the parameterization slowed down modelsim so much. 2023-05-24 12:44:42 -05:00
Ross Thompson
6163fc29e1 Adds local history predictor. 
Fixes performance counters, but not coremark.
 2023-05-23 18:53:46 -05:00
Ross Thompson
1dc7fb567b Merge branch 'localhistory' 
Repair to wave file.
Created implementations of local history. Part of my Ph.D. research.
 2023-05-22 10:13:31 -05:00
Ross Thompson
81b33fb48e Fixes load and store stall counters. 2023-05-22 10:08:49 -05:00
Ross Thompson
2612ca4062 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-05-11 14:56:53 -05:00
Ross Thompson
03823a9bc1 Partially working local history repair. 2023-05-11 14:56:26 -05:00
Ross Thompson
e34b25511a Baseline localhistory with speculative repair built. 2023-05-05 15:23:45 -05:00
Ross Thompson
faf71294d6 Fixed bug in local history predictor. 2023-05-04 16:54:41 -05:00
Ross Thompson
e11d42b270 Almost working ahead pipelined local history predictor. 2023-05-04 16:17:31 -05:00
Ross Thompson
8da2b18543 Maybe I finally have the ahead pipelined local history predictor working. 2023-05-04 14:11:34 -05:00
Ross Thompson
afafa9718d Ahead pipelining is not yet working. :( 2023-05-03 17:41:38 -05:00
Ross Thompson
35a59a1193 I think ahead pipelining is working for local history. 2023-05-03 12:52:32 -05:00
Ross Thompson
c4d6724867 Updated configs for local branch history `defines. 2023-05-02 11:11:04 -05:00
Ross Thompson
9ee6ba8964 Added comment explaining the difference between global history and local history basic implementations. 2023-05-02 11:01:46 -05:00
Ross Thompson
799c25cc60 Swapped the m and k parameters for local history predictor. 2023-05-02 10:52:41 -05:00
Ross Thompson
b9abb2a491 Maybe have the baseline local history predictor working. 2023-05-01 15:45:27 -05:00
Ross Thompson
6e6185743a Merge branch 'main' into localhistory 2023-05-01 10:35:50 -05:00
David Harris
c1786bfec8 IMMU exclude non word-sized accesses 2023-05-01 08:14:19 -07:00
Ross Thompson
f1038f1eec Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-04-30 23:30:13 -05:00
David Harris
bfa35d727b Fixed redundant check of SupportedFmt on fmv that caused coverage problem on fctrl 2023-04-29 05:58:40 -07:00
David Harris
d5c350c597 Merged coverage exclusions for PMP 2023-04-28 08:04:25 -07:00
David Harris
ca5a71bbe5 PMA Checker coverage 2023-04-28 07:53:59 -07:00
David Harris
22e4f82a99 Commenting 2023-04-28 07:52:08 -07:00
David Harris
f6f43e826a Removed clear from TLBLRU because there is no need to flush LRU state and it causes coverage issues 2023-04-28 07:03:46 -07:00
Ross Thompson
253344f491 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-04-27 16:38:36 -05:00
David Harris
e962e95e53 CSR code cleanup 2023-04-27 14:12:57 -07:00
David Harris
e519eaa33f Renamed byteUnit to byteop 2023-04-27 14:10:46 -07:00
Ross Thompson
8eaa4bf075 Fixed bug in cacheLRU when NUMWAYS = 2. 2023-04-27 14:30:01 -05:00
Liam
6803347a49 Pmpadrdecs test cases changing AdrMode to 2 or 3 
Setting AdrMode to 2 or 3 for pmpadrdecs[0-4] writing values to pmpcfg0 to change AdrMode to 2 or 3
Also exclusion for pmpadrdecs[0] coverage case for PAgePMPAdrIn being hardwired to 1 in pmpadrdec.sv
 2023-04-27 12:23:35 -07:00
David Harris
e69ebc45c0 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-04-27 07:30:07 -07:00
Alexa Wright
667c54c129
Merge branch 'openhwgroup:main' into main 2023-04-26 16:26:30 -07:00
Alexa Wright
79031e3de0 Added better comment for the exclusion in privdec.sv 2023-04-26 16:25:55 -07:00
David Harris
7c1a4e5e32 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-04-26 15:40:11 -07:00
David Harris
0ad5165795
Merge pull request #283 from SydRiley/main 
Resolving unpackinput coverage issue with BadNaNBox, and increasing ifu and lsu coverage% through exclusions
 2023-04-26 15:40:01 -07:00
Sydeny
4595c22fe1 Addressing Redundant logic around BadNanBox, fpu coverage from 96.61% to 96.77% 2023-04-26 14:35:43 -07:00
David Harris
d71d84b386 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-04-26 05:53:42 -07:00
Alec Vercruysse
6299c0ef0b Cacheway Exclude FlushStage=1 when SetValidWay=1 
We determined that this case is not hit even for i$, so this
case is also excluded separately for i$. It could be a better
idea to remove the ~FlushStage check completely (if we're sure).

My reasoning for this one is written as a comment in the exclusion
script: since a pipeline stall is asserted by the cache in the fetch
stage (which happens before going into the WRITE_LINE state and
asserting SetValidWay), there seems to be no way to trigger
a FlushStage (FlushW for D$) while the stallM is active.
 2023-04-25 20:30:46 -07:00
Alexa Wright
55a74fd315 Excluded and added coverage for WFI test case. 2023-04-25 17:06:57 -07:00
Alec Vercruysse
2f49ee18fe Cacheway exclude SelFlush=0 while FlushWay=0 in FlushWayEn assign 
FlushWay is always 1 for one way, but by default it is only 1 for
way 0.

The logic that advances FlushWay to ways 1, 2, and 3 only does so
on a subset of conditions that SelFlush is high (in cachefsm), so
this is unreachable for cachways 1-3.
 2023-04-25 17:02:53 -07:00
David Harris
03448aa691 Commented about Sstvecd trap vector alignment 2023-04-24 12:20:33 -07:00
David Harris
8bf9329815 Added M suffix in atomic 2023-04-24 12:19:56 -07:00
Ross Thompson
89a242d143 Might actually have a correct implementation of local history branch prediction. 2023-04-24 13:05:28 -05:00
Ross Thompson
7588de5a36 Fixed the local branch predictor so that it at least compiles. 2023-04-24 11:06:53 -05:00