David Harris
|
71268cc0e8
|
Added ASID & Global PTE handling to TLB CAM
|
2021-07-04 17:53:08 -04:00 |
|
David Harris
|
6b9cfe90d8
|
Added ASID & Global PTE handling to TLB CAM
|
2021-07-04 17:52:00 -04:00 |
|
Ross Thompson
|
f2c4df0a5b
|
Removed the TranslationVAdrQ as it is not necessary.
|
2021-07-04 16:49:34 -05:00 |
|
bbracker
|
a20afc6e1a
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
|
2021-07-04 17:20:55 -04:00 |
|
bbracker
|
96939328ea
|
for GPIO give priority to clearing interrupts
|
2021-07-04 17:20:16 -04:00 |
|
Ross Thompson
|
031228fef1
|
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
|
2021-07-04 16:19:42 -05:00 |
|
Ross Thompson
|
8e48865140
|
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
|
2021-07-04 16:19:39 -05:00 |
|
bbracker
|
aeaa912cab
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
|
2021-07-04 17:15:40 -04:00 |
|
David Harris
|
d138d6545d
|
Restructured TLB Read as AND-OR operation with one-hot match/read line
|
2021-07-04 17:01:22 -04:00 |
|
David Harris
|
b59213c83f
|
Reorganized TLB to use one-hot read/write select signals to eliminate decoders and encoders
|
2021-07-04 16:33:13 -04:00 |
|
bbracker
|
322586189c
|
comment out rv64 virtual memory test so that tests make successfully
|
2021-07-04 16:16:59 -04:00 |
|
David Harris
|
deae60eb1d
|
TLB cleanup
|
2021-07-04 14:59:04 -04:00 |
|
Ross Thompson
|
8ae0a5bd7d
|
relocated lsuarb and pagetable walker inside the lsu. Does not pass busybear or buildroot, but passes rv32ic and rv64ic.
|
2021-07-04 13:49:38 -05:00 |
|
David Harris
|
243c03f870
|
TLB cleanup
|
2021-07-04 14:37:53 -04:00 |
|
David Harris
|
1ae58b3ba3
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
|
2021-07-04 14:31:01 -04:00 |
|
David Harris
|
fed096407b
|
TLB minor organization
|
2021-07-04 14:30:56 -04:00 |
|
bbracker
|
834c10c58c
|
Revert "Make Wally take InstrPageFaultF traps"
This reverts commit 7a810357d7.
|
2021-07-04 13:31:30 -04:00 |
|
David Harris
|
a5c0dc8c81
|
Fixed MPRV and MXR checks in TLB
|
2021-07-04 13:20:29 -04:00 |
|
David Harris
|
5b891e05ac
|
TLB mux and swizzling cleanup
|
2021-07-04 12:53:52 -04:00 |
|
bbracker
|
92337134f6
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
|
2021-07-04 12:48:20 -04:00 |
|
bbracker
|
7a810357d7
|
Make Wally take InstrPageFaultF traps
|
2021-07-04 12:48:13 -04:00 |
|
David Harris
|
622060b99f
|
Replaced generates with arrays in TLB
|
2021-07-04 12:32:27 -04:00 |
|
David Harris
|
b5df9b282d
|
Added support for PMP lock bits in csrm and repartitioned design to pass around 8-bit PMPCFG entries
|
2021-07-04 11:39:59 -04:00 |
|
David Harris
|
9276446797
|
Switched to array notation for pmpchecker
|
2021-07-04 10:51:56 -04:00 |
|
Kip Macsai-Goren
|
21a4214d73
|
sv48 test makes as well, does not pass regression
|
2021-07-04 01:59:18 -04:00 |
|
Kip Macsai-Goren
|
1bf2cfa016
|
Name Change, clean up on lots of comments,
|
2021-07-04 01:58:54 -04:00 |
|
David Harris
|
c016ab8e58
|
Commented out some unused modules
|
2021-07-04 01:40:27 -04:00 |
|
David Harris
|
1bd353c1d7
|
Merge conflict on linux-waves.do
|
2021-07-04 01:22:10 -04:00 |
|
David Harris
|
c897bef8cd
|
Moved BOOTTIM to 0x1000-0x1FFF. Added logic to detect an access to undefined memory and assert HREADY so bus doesn't hang.
|
2021-07-04 01:19:38 -04:00 |
|
bbracker
|
17ef10568f
|
optionally output GDB-formatted instruction list to main buildroot folder
|
2021-07-03 17:25:19 -04:00 |
|
Ross Thompson
|
9b959715a0
|
removed mmustall and finished port annotations on ptw and lsuArb.
|
2021-07-03 16:06:09 -05:00 |
|
Ross Thompson
|
fd088f8ecd
|
Added explicit names to lsu, lsuarb and pagetable walker to make the code refactoring process eaiser.
|
2021-07-03 15:51:25 -05:00 |
|
Kip Macsai-Goren
|
eedb198d78
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
|
2021-07-03 16:32:27 -04:00 |
|
Kip Macsai-Goren
|
a884d7cf94
|
mmu test fully compiles and produces correct ovpsim outputs. regression is as of yet untested.
|
2021-07-03 16:32:04 -04:00 |
|
Ben Bracker
|
66692af57c
|
src/cache/ICacheCntrl.sv
|
2021-07-03 11:24:41 -05:00 |
|
Ben Bracker
|
d6c7dc02ed
|
fix ICache indenting
|
2021-07-03 11:11:07 -05:00 |
|
David Harris
|
ee605d7550
|
Changed IMMU ExecuteAccessF to 1 rather than InstrReadF to fix buildroot; simplified PMP checker
|
2021-07-03 03:29:33 -04:00 |
|
David Harris
|
d3dedc1637
|
Cleaned up PMA/PMP checker unused code
|
2021-07-03 02:25:31 -04:00 |
|
Ben Bracker
|
9709bd78e1
|
stop busybear from hanging
|
2021-07-02 17:22:09 -05:00 |
|
David Harris
|
4ec570d2d7
|
Fixed PMPCFG read faults
|
2021-07-02 17:08:13 -04:00 |
|
Ross Thompson
|
16e672ada0
|
Fixed up the physical address generation for 64 bit page table walker.
|
2021-07-02 15:49:32 -05:00 |
|
Ross Thompson
|
a8fbbb0631
|
Fixed up the bit widths on the page table walker for rv32.
|
2021-07-02 15:45:05 -05:00 |
|
Ross Thompson
|
46831035fb
|
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
|
2021-07-02 13:56:49 -05:00 |
|
Katherine Parry
|
4a6abe0f50
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
|
2021-07-02 12:56:53 -04:00 |
|
Katherine Parry
|
72406b8a88
|
FPU update - missing files
|
2021-07-02 12:53:05 -04:00 |
|
Ross Thompson
|
549b7b2a62
|
Merge branch 'main' into bigbadbranch
|
2021-07-02 11:52:26 -05:00 |
|
David Harris
|
1ce98cc100
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
|
2021-07-02 12:52:20 -04:00 |
|
Katherine Parry
|
3f61e313d2
|
FPU update
|
2021-07-02 12:40:58 -04:00 |
|
David Harris
|
cd6cabac2f
|
Optimized PMP checker logic and added support for configurable number of PMP registers
|
2021-07-02 11:05:25 -04:00 |
|
David Harris
|
648c09e5ef
|
Optimized PMP checker logic and added support for configurable number of PMP registers
|
2021-07-02 11:04:13 -04:00 |
|