61 Commits

Author	SHA1	Message	Date
Thomas Fleming	ca2a65770c	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2021-03-05 15:46:51 -05:00
Thomas Fleming	85dcbee86b	Place tlb parameters into constant header file	2021-03-05 13:35:24 -05:00
Noah Boorstin	0af002eb2f	busybear: make CSRs only weird for us	2021-03-05 00:46:32 +00:00
Noah Boorstin	f11b3108d8	busybear: fix bootram range	2021-03-01 17:45:21 +00:00
Noah Boorstin	2769b147cb	busybear: add 2nd dtim for bootram	2021-02-28 16:08:54 +00:00
Noah Boorstin	969c094489	busybear: remove gpio, start adding 2nd ram	2021-02-28 06:02:40 +00:00
Noah Boorstin	cca60ed06d	update busybear testbench to conform to new structure ... aaaaaaaaaaaaaaaaaahhhh so many changes also the testbench now uses another internal signal, which I don't like, but I can't think of a better option rn	2021-01-30 19:19:00 +00:00
Noah Boorstin	7183910c84	update busybear testbench to conform to new structure	2021-01-29 17:46:50 +00:00
Noah Boorstin	0fa7cffb11	busybear: lie about MISA to match OVP's MISA	2021-01-29 00:58:56 -05:00
Noah Boorstin	91dcffa26f	Update busybear tests to conform to new directory structure	2021-01-25 20:37:18 -05:00
David Harris	bf07ec92b5	Added test configurations	2021-01-25 11:28:43 -05:00