Ross Thompson
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0ecd1ef681
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Setup the testbench to exclude the warmup from performance counter reports.
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2023-03-03 13:10:01 -06:00 |
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Kip Macsai-Goren
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3891596962
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Merge branch 'bit-manip' of github.com:kipmacsaigoren/cvw into bit-manip
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2023-03-03 09:56:51 -08:00 |
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Kip Macsai-Goren
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1e1ce01fbb
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Merge branch 'main' of github.com:kipmacsaigoren/cvw into bit-manip
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2023-03-03 09:56:34 -08:00 |
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Kevin Kim
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dfbdd6d939
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Merge pull request #2 from kipmacsaigoren/bctrlmigrate
bctrl migration started
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2023-03-03 09:56:25 -08:00 |
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Kevin Kim
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d6f8c1dd29
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Merge branch 'bctrlmigrate' of https://github.com/kipmacsaigoren/cvw into bctrlmigrate
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2023-03-03 09:54:08 -08:00 |
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Kevin Kim
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1c55d4a8d5
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Merge branch 'openhwgroup:main' into bctrlmigrate
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2023-03-03 09:53:59 -08:00 |
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Kip Macsai-Goren
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cf1e41a576
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Merge remote-tracking branch 'upstream/main' into main
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2023-03-03 09:48:13 -08:00 |
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Kip Macsai-Goren
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fcad531f59
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Merge branch 'bit-manip' of github.com:kipmacsaigoren/cvw into bit-manip
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2023-03-03 09:39:52 -08:00 |
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Kip Macsai-Goren
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6be322941d
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Merge remote-tracking branch 'upstream/main' into bit-manip
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2023-03-03 09:36:44 -08:00 |
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Kevin Kim
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422b428cba
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removed outdated b-signals in controller
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2023-03-03 08:45:42 -08:00 |
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Ross Thompson
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e70492ea3f
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Added performance new counter prints to testbench.
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2023-03-03 10:42:52 -06:00 |
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Kevin Kim
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9cad890c1a
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comments to bctrl
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2023-03-03 08:41:47 -08:00 |
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Kevin Kim
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19410b4196
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migrated B-subarith logic into b controller
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2023-03-03 08:40:29 -08:00 |
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Kevin Kim
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2c3271dd62
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began subarith configurability optimization in controller
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2023-03-03 08:27:11 -08:00 |
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David Harris
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27f669118d
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Merge pull request #124 from ross144/main
Added additional performance counters. Ch 5 is update todate with these changes.
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2023-03-03 06:15:49 -08:00 |
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Ross Thompson
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dc49c2612d
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-03-03 00:22:27 -06:00 |
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Ross Thompson
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0cb5369351
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Renamed BTB misprediction to BTA.
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2023-03-03 00:18:34 -06:00 |
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Ross Thompson
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5b5677ccb8
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Added divide cycle counter.
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2023-03-02 23:59:52 -06:00 |
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Ross Thompson
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aabb454d1c
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Added the i and d cache cycle counters.
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2023-03-02 23:54:56 -06:00 |
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Ross Thompson
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cfca77172e
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Added fence counter.
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2023-03-02 23:29:20 -06:00 |
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Ross Thompson
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f32f8c109a
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Added csr write counter, sfence vma counter, interrupt counter, and exception counter.
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2023-03-02 23:21:29 -06:00 |
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Ross Thompson
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a313b10912
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Added store stall to performance counters.
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2023-03-02 23:10:54 -06:00 |
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Ross Thompson
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2dd693a3b3
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Reordered performance counters and added space for new ones.
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2023-03-02 23:04:31 -06:00 |
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Ross Thompson
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724f2634c5
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Fixed bug in performance counter script.
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2023-03-02 22:32:13 -06:00 |
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Ross Thompson
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1f3639bff6
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Added support for branch target buffer stats.
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2023-03-02 22:16:30 -06:00 |
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David Harris
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316b8b2250
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Refactored Floating point division special case detection to avoid spurious trigger on Y for sqrt)
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2023-03-02 20:00:47 -08:00 |
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Kevin Kim
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b21ca2fba0
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bug fix, more elegant logic changes in controller
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2023-03-02 16:00:56 -08:00 |
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Kevin Kim
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c9bd37c92b
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formatting
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2023-03-02 15:28:43 -08:00 |
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Kevin Kim
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910eeea3ff
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removed main instruction decoder dependence on bmu controller
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2023-03-02 15:28:33 -08:00 |
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Kevin Kim
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05b329dd6a
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added bitmanip illegal instruction signal
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2023-03-02 15:09:55 -08:00 |
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Kevin Kim
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3e8e633a56
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zbc comments
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2023-03-02 13:52:00 -08:00 |
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Kevin Kim
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b0307f5082
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formatted bmu decoder
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2023-03-02 13:45:15 -08:00 |
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Kevin Kim
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24b0b83d52
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moved ALUControlD into configurable block
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2023-03-02 12:17:03 -08:00 |
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Kevin Kim
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0f60505179
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moved SubArith and RegWriteE into configurable block
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2023-03-02 12:15:57 -08:00 |
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Kevin Kim
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b81a5e4452
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added BRegWriteE signal
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2023-03-02 12:15:22 -08:00 |
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Kevin Kim
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5e10720bed
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rename shifternew to shifter
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2023-03-02 11:45:32 -08:00 |
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Kevin Kim
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cf324510f3
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zbc input select mux optimize
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2023-03-02 11:43:05 -08:00 |
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Kevin Kim
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657719220a
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zbc select mux optimization
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2023-03-02 11:40:29 -08:00 |
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Kevin Kim
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e62a752522
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fixed controller lint, changed byte unit mux select name and input width
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2023-03-02 11:36:12 -08:00 |
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Kevin Kim
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a5e2e24320
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removed redundant zbs
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2023-03-02 11:22:09 -08:00 |
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Ross Thompson
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9bd6851ed5
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Merge pull request #123 from eroom1966/main
fix the memory map privileges in the REF model view
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2023-03-02 09:27:35 -06:00 |
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eroom1966
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fe4d9d3e37
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fix the memory map privileges in the REF model view
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2023-03-02 15:25:27 +00:00 |
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Ross Thompson
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b98e007a53
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Cleaned up branch predictor performance counters.
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2023-03-01 17:05:42 -06:00 |
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David Harris
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5c8c50adba
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-03-01 11:18:05 -08:00 |
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David Harris
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23775c6d67
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Renamed I/D TLBMissOrDAFault to TLBMissOrUpdateDA for consistency with UpdateDA
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2023-03-01 11:18:00 -08:00 |
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David Harris
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a7b15c4503
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Merge pull request #121 from ross144/main
Branch predictor cleanup. Chapter 10 now matches the hardware
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2023-03-01 09:57:59 -08:00 |
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Ross Thompson
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90b2f0a652
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Set bp to use instruction class prediction by default.
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2023-03-01 11:52:42 -06:00 |
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Ross Thompson
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dea6b643a6
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Branch predictor cleanup.
I think Ch 10 is now done except for BTB performance analysis and the section on running benchmarks and collecting data.
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2023-03-01 11:24:24 -06:00 |
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Ross Thompson
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03a6679ba0
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More btb cleanup.
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2023-03-01 10:47:00 -06:00 |
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Ross Thompson
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554e7d0973
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Minor fix to btb.
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2023-03-01 10:45:40 -06:00 |
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