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4392 Commits

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Author SHA1 Message Date
David Harris
f10793e85d Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-08-22 08:28:31 +00:00
David Harris
f6f09db4fb Commented out unused comparators 2022-08-22 08:28:28 +00:00
Ross Thompson
7b5e2ccae2 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-08-21 16:08:59 -05:00
Ross Thompson
dbbb3ff1d1 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-08-21 16:03:11 -05:00
Ross Thompson
ebe4339953 Updated fpga test bench. 
Solved read delay cache bug.  Introduced during cache optimizations.
 2022-08-21 15:59:54 -05:00
Ross Thompson
85dbec5969 Hmm. Found a bug with the cache's changes from the summer. Cannot return data to CPU at the same time as a write to cache's SRAM and also start another memory operation. 2022-08-21 15:28:29 -05:00
Ross Thompson
f3f0f12904 Removed logic from Verilog wrapper. 2022-08-21 14:07:43 -05:00
Ross Thompson
82cce9a627 Updated fpga testbench. 2022-08-21 14:07:26 -05:00
Katherine Parry
a191603a1a fixed -1 issue in division 2022-08-20 00:53:45 +00:00
Ross Thompson
2ba390adf4 Possible reduction of ignorerequest. 2022-08-19 18:07:44 -05:00
Ross Thompson
8180d1ade4 Updated fpga debugger to latest RTL version. 2022-08-19 17:13:36 -05:00
Ross Thompson
8b2491c169 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-08-19 16:39:28 -05:00
Ross Thompson
517c0f6c35 Changed signal names. 2022-08-17 16:12:04 -05:00
Ross Thompson
f6e5746e59 Better name for LSUBusWriteCrit. Changed to SelLSUBusWord. 2022-08-17 16:09:20 -05:00
Ross Thompson
299aefb76a Removed old code from interlockfsm. 2022-08-17 12:52:56 -05:00
Katherine Parry
9549c23f45 sqrt tests in regression uncommented and pass 2022-08-07 23:38:10 +00:00
Katherine Parry
cb0c1b7488 radix-2 1 copy passes testfloat 2022-08-06 22:54:05 +00:00
Katherine Parry
de6ae471bc fixed fsw problem and removed 2 bit shift from shift correction 2022-08-03 22:16:51 +00:00
David Harris
898dbc8e74 Completed PLIC-S tests. Regression working. This completes peripheral tests. 2022-08-03 09:33:56 -07:00
David Harris
4fb467ee8a Debugging plic-s test 2022-08-03 13:21:09 +00:00
David Harris
7e5b78f240 plic-s debug 2022-08-03 12:33:09 +00:00
David Harris
1039b13da6 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-08-03 03:48:11 +00:00
David Harris
cab0349701 Started plic-s tests 2022-08-03 03:48:08 +00:00
Madeleine Masser-Frye
c866344fb6 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-08-02 16:25:25 +00:00
David Harris
e70b28f7f6 FMA cleanup 2022-08-02 07:42:32 -07:00
David Harris
2b932c4b80 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-08-02 07:34:12 -07:00
David Harris
887e4c73fb Moved InvA to sign block; simplified fmaexpadd coding 2022-08-02 07:34:09 -07:00
Madeleine Masser-Frye
9963344330 changed synthesis to write modified config files in output directory 2022-08-02 12:19:14 +00:00
Madeleine Masser-Frye
a0b3367218 edited indentation 2022-08-02 10:23:04 +00:00
Ross Thompson
413a9bf58b Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-08-01 22:09:11 -05:00
Ross Thompson
57fcf0ef79 Fixed fstore2 in cache? 2022-08-01 22:04:44 -05:00
David Harris
06c4f18cd1 merged lza back into main 2022-08-01 19:45:21 -07:00
David Harris
8147f75399 Fixed fmaadd to work with new LZA 2022-08-01 19:40:55 -07:00
Ross Thompson
797d9e3610 Replaced swbytemask with swbytemaskword (1 liner). Credit to David Harris. 2022-08-01 21:12:25 -05:00
Ross Thompson
3cd8404917 Replaced LOGWPL with LOGBWPL (Bus words per line) and LOGCWPL (cache words per line). Replaced with wordlen/8 bytemask. 2022-08-01 21:08:14 -05:00
Ross Thompson
3612db2d70 pulled swbbytemask out of subword write. 2022-08-01 20:48:45 -05:00
David Harris
7e4b04ff64 Parameterized fmalza 2022-08-01 16:18:02 -07:00
David Harris
94fa7a00e7 Completed LZA simplificaiton 2022-08-01 16:13:16 -07:00
David Harris
3b937b73fd lza cleanup 2022-08-01 16:01:02 -07:00
David Harris
b614f165fb Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-08-01 15:47:58 -07:00
David Harris
91597bba87 lza cleanup 2022-08-01 15:47:03 -07:00
David Harris
f56b26ec40 lza cleanup 2022-08-01 15:43:48 -07:00
David Harris
c3e9719c99 lza cleanup 2022-08-01 15:40:12 -07:00
David Harris
d6b5e7a6ef lza cleanup 2022-08-01 15:37:09 -07:00
Katherine Parry
8ff3a693af regression passes fpu tests 2022-08-01 19:56:25 +00:00
Katherine Parry
9c68f85822 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-08-01 19:55:50 +00:00
David Harris
2869d67e50 more lza cleanup 2022-08-01 12:34:00 -07:00
David Harris
b34d2065c3 LZA cleanup 2022-08-01 12:30:42 -07:00
David Harris
99462049e7 LZA refactoring switched to Pp1, Gm1, Km1 2022-08-01 12:20:23 -07:00
David Harris
3c08aabcd3 LZA refactoring 2022-08-01 11:36:21 -07:00