Katherine Parry
|
c56fdd7e0f
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
|
2022-07-08 12:30:50 -07:00 |
|
Katherine Parry
|
88b4f9b40a
|
renamed signals in cvt and prostproc
|
2022-07-08 12:30:43 -07:00 |
|
David Harris
|
8be1dafbd6
|
Removed testbench code that ignores mismatch on zero signatures
|
2022-07-08 09:17:31 +00:00 |
|
DTowersM
|
4786fb9fd6
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into HEAD
|
2022-07-07 23:11:35 +00:00 |
|
DTowersM
|
aa8580b2dc
|
new slim benchmarks/coremark directory now works on addins/coremark repo, removed old riscv-coremark directory
|
2022-07-07 23:11:02 +00:00 |
|
Katherine Parry
|
75a8cea4e4
|
srt divider merged into fpu
|
2022-07-07 16:01:33 -07:00 |
|
David Harris
|
f865994ba1
|
fixing port errors
|
2022-07-07 21:57:10 +00:00 |
|
Katherine Parry
|
7771f7b3eb
|
added load and store test
|
2022-07-07 21:48:51 +00:00 |
|
DTowersM
|
5dfff900b1
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into HEAD
|
2022-07-06 23:44:27 +00:00 |
|
DTowersM
|
67c5d66209
|
added changes to the testbench and benchmarks/coremark to support running the addins directory without the fpu
|
2022-07-06 23:43:57 +00:00 |
|
David Harris
|
f5bdbbe219
|
Removed sig4 spurious message from testbench
|
2022-07-05 03:27:14 +00:00 |
|
Katherine Parry
|
2fc795ca70
|
added missing files
|
2022-07-03 21:40:47 -07:00 |
|
Katherine Parry
|
8ac722f693
|
Renaming signals to match chapter
|
2022-07-03 12:26:22 -07:00 |
|
Daniel Torres
|
d1eebac73f
|
reverted tests.vh to work on existing flow, added commented out paths to new riscof tests once that build has finished
|
2022-06-29 12:32:30 -07:00 |
|
Daniel Torres
|
2ae22ac6cb
|
added changes to testbench, tests and riscof for additional riscof compatability
|
2022-06-29 12:23:40 -07:00 |
|
slmnemo
|
228028c837
|
Add CLINT tests from book
|
2022-06-27 20:09:58 -07:00 |
|
Katherine Parry
|
a5fb60eb1a
|
radix-4 early termination working for special cases - not working completely
|
2022-06-27 20:43:55 +00:00 |
|
Katherine Parry
|
70a1bb8377
|
fixed commented out error and removed killprod from result selection
|
2022-06-25 01:42:23 +00:00 |
|
Katherine Parry
|
9eefba5b58
|
added denormal input handeling - radix 4
|
2022-06-24 19:41:40 +00:00 |
|
Katherine Parry
|
de71773d69
|
added radix-4 0/d handling
|
2022-06-23 22:36:19 +00:00 |
|
Katherine Parry
|
a5fc6757a1
|
generate qsel4 in verilog
|
2022-06-23 21:38:04 +00:00 |
|
Katherine Parry
|
d7a363aaa7
|
fixt lint error
|
2022-06-23 16:11:50 +00:00 |
|
Katherine Parry
|
1612daa294
|
Testfloat running division - not passing
|
2022-06-23 00:07:34 +00:00 |
|
David Harris
|
d865a1ce95
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally
|
2022-06-21 22:45:28 +00:00 |
|
slmnemo
|
80a57d0469
|
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
|
2022-06-21 02:16:26 -07:00 |
|
slmnemo
|
b2cea45de0
|
Added rudimentary GPIO test according to testplans in chapter 15
|
2022-06-21 02:16:21 -07:00 |
|
Katherine Parry
|
03d823f5d7
|
added fld in rv32 - needs testing
|
2022-06-20 22:53:13 +00:00 |
|
Daniel Torres
|
397783812d
|
embench and testbench now support running both O2 and Os build variations without overwriting one another
|
2022-06-17 21:15:42 -07:00 |
|
Daniel Torres
|
1d4c543f71
|
arch tests now run on spike and sail and compare signatures during build
|
2022-06-17 20:53:15 -07:00 |
|
Daniel Torres
|
0ede7c412e
|
removed old code from makefile, simplified code in testbench
|
2022-06-17 15:13:38 -07:00 |
|
Daniel Torres
|
475220a5ff
|
arch bug fixes and testbench changes
|
2022-06-17 15:07:16 -07:00 |
|
David Harris
|
f6e52c7f08
|
Removed testbench.sv.bak
|
2022-06-14 22:04:38 +00:00 |
|
DTowersM
|
7c0f4dd954
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
|
2022-06-13 23:34:35 +00:00 |
|
DTowersM
|
39ed36d0ba
|
added back working coremark in benchmarks/riscv64-bcoremarkdirectory, experimental simplifications are in benchmarkscoremark/ but this doesn't currently work (some type of c bug)
|
2022-06-13 23:23:57 +00:00 |
|
Katherine Parry
|
5f7072bd96
|
postprocessing unit created and passing all tests
|
2022-06-13 22:47:51 +00:00 |
|
DTowersM
|
a61d1ab087
|
simplified coremark
|
2022-06-10 19:15:17 +00:00 |
|
slmnemo
|
a5aa75e5de
|
Merge branch 'main' into cacheburstmode
|
2022-06-08 02:21:33 +00:00 |
|
DTowersM
|
1d41e98504
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
|
2022-06-07 23:58:58 +00:00 |
|
DTowersM
|
3d654fd481
|
modified testbench.sv- now works with coremark
|
2022-06-07 23:58:50 +00:00 |
|
DTowersM
|
930c806753
|
cleaned up the <begin_signature> code, now works for code bases larger than 0x10000000
|
2022-06-07 23:27:54 +00:00 |
|
DTowersM
|
4cadf139a6
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
|
2022-06-07 06:03:19 +00:00 |
|
DTowersM
|
fbfae61ba8
|
added support for 64 bit rv tests
|
2022-06-07 06:02:23 +00:00 |
|
Katherine Parry
|
b8cff98e48
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
|
2022-06-06 16:06:54 +00:00 |
|
Katherine Parry
|
eb93bd46d7
|
fma synth warnings and errors removed
|
2022-06-06 16:06:04 +00:00 |
|
slmnemo
|
8c3d7b404b
|
Fixed recurrent issue with testbench where it would never stop
|
2022-06-03 18:56:24 -07:00 |
|
DTowersM
|
23d524b439
|
testbench now reads begin_signature addr from .objdump.addr instead of from tests.vh
|
2022-06-03 22:07:14 +00:00 |
|
Katherine Parry
|
5ae63f913a
|
fixed compilation errors
|
2022-06-03 15:34:17 +00:00 |
|
Katherine Parry
|
019994c802
|
removed some debuging code accedentally pushed
|
2022-06-02 22:45:19 +00:00 |
|
slmnemo
|
b35824eadd
|
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
|
2022-06-02 12:54:08 -07:00 |
|
Katherine Parry
|
ccda4c771e
|
fpu paramaterized - except fdivsqrt
|
2022-06-02 19:50:28 +00:00 |
|