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550c4d380c
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50 Commits

Author SHA1 Message Date
Katherine Parry
550c4d380c fcvt.sv paramaterized 2022-05-26 20:48:22 +00:00
Katherine Parry
c264585fe8 single and double conversions pass all tests 2022-05-25 23:02:02 +00:00
Katherine Parry
cc0ab94ebc Added fp tests - doesnpass yet 2022-05-19 16:32:30 +00:00
slmnemo
ede0a3237d quit 2022-05-17 01:03:09 +00:00
David Harris
8066ba45e8 Preliminary support for big endian modes. Regression passes but no big endian tests written yet. 2022-05-08 06:46:35 +00:00
Kip Macsai-Goren
3d1e1202f3 set WFI timeout to after 16 bits of counting for all configs 2022-04-28 18:14:08 +00:00
Kip Macsai-Goren
da29193f9b removed atomic, floating point from privileged tests configs 2022-04-25 19:13:15 +00:00
Kip Macsai-Goren
7fe33b2147 Lowered WFI timeout wait time for privileged configs 2022-04-25 17:47:10 +00:00
bbracker
5e76c83309 deprecate unused LINUX_FIX_READ macro 2022-04-21 19:14:47 -07:00
Kip Macsai-Goren
080963c381 fixed rv32ia to support clint and GPIO for priv tests 2022-04-20 17:31:34 +00:00
Shreya Sanghai
c3164f0ce1 added bpred size to wally config 2022-04-18 04:21:03 +00:00
David Harris
2436534687 First implementation of WFI timeout wait 2022-04-17 17:20:35 +00:00
Kip Macsai-Goren
c82667653c Added missing ZFH macro to new configs 2022-04-06 07:13:51 +00:00
Katherine Parry
20885f4dea generating all testfloat vectors 2022-04-04 17:17:12 +00:00
Kip Macsai-Goren
cdea062287 added RV64IA config to have a config without compressed instructions 2022-04-02 18:24:08 +00:00
Ross Thompson
57eba4355e Updated the fpga test bench. 2022-04-01 17:14:47 -05:00
Ross Thompson
6c9750c725 reverted temporary change to configs. 2022-03-22 22:31:34 -05:00
Ross Thompson
600a97982f Reverted change to configuration which caused issue with lint. 2022-03-22 21:44:08 -05:00
Katherine Parry
2042374102 FMA parameterized and FMA testbench reworked 2022-03-19 19:39:03 +00:00
Ross Thompson
e802deb4d6 Can now support the following memory and bus configurations. 
1. dtim/irom only
2. bus only
3. dtim/irom + bus
4. caches + bus
 2022-03-11 15:18:56 -06:00
bbracker
04ace8c154 switch linux-testbench infrastructure over to new linux testvectors at /opt/riscv 2022-03-01 03:11:43 +00:00
bbracker
6caa97bb26 change UART PLIC IRQ mapping from 4 to 10 to match virt model; move WALLY-PERIPH tests to wally arch tests 2022-02-22 03:46:08 +00:00
Ross Thompson
6cd9d84e7f New config option to enable hptw writes to PTE in memory to update Access and Dirty bits. 2022-02-17 17:19:41 -06:00
Ross Thompson
13561c67bd Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-02-08 14:22:19 -06:00
David Harris
c07584bb70 rv32e config update 2022-02-08 17:59:50 +00:00
Ross Thompson
c2377eaaf4 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-02-08 11:36:30 -06:00
Ross Thompson
3cd067ac6a Finished merge. 2022-02-08 11:36:24 -06:00
David Harris
9ad3f26365 Restored E tests to makefrag 2022-02-08 16:41:11 +00:00
David Harris
096242a6d8 Merged TIM and regular testbenches. RV32e now working and back in regression. 2022-02-08 12:18:13 +00:00
Ross Thompson
308cc34d6f Added config to allow using the save/restore or replay implementation to handle sram clocked read delay. 2022-02-04 23:49:07 -06:00
David Harris
0dd8c719ad Modified regression to use proper rv32e test name, but rv32e_wally32e still isn't passing due to loop exceeding iteration limit 2022-02-05 05:35:51 +00:00
David Harris
23868a33bc Temporarily changed rv32e config to use TIM, but it still fails. Added rv32e tests. 2022-02-05 04:16:18 +00:00
David Harris
14c1d86953 rv32e 2022-02-04 01:56:30 +00:00
David Harris
1c049f1f67 renamed configs 2022-02-03 23:36:41 +00:00
David Harris
9e0055cbb9 More config file cleanup; 32ic tests broken 2022-02-03 01:08:34 +00:00
David Harris
bdf1a8ba73 changed DMEM and IMEM configurations to support BUS/TIM/CACHE 2022-02-03 00:41:09 +00:00
David Harris
172a02551b Removed Busybear and Buildroot Configuration 2022-02-02 20:32:22 +00:00
David Harris
761dae72fe Config file & wally-riscv-arch-test cleanup 2022-02-02 16:35:52 +00:00
David Harris
2d112698b7 Replaced || and && with | and & 2022-01-31 01:07:35 +00:00
David Harris
975c0e72c8 Set up rv32emc config 2022-01-27 14:37:58 +00:00
David Harris
c6adb7b6b1 Updated configs to fix GPIO address to match FU540 2022-01-26 18:16:34 +00:00
David Harris
5842d780a7 Defined rv32e and rv32emc configs 2022-01-17 14:01:01 +00:00
Ross Thompson
ce937a35a8 Added tim only test to regression-wally. Minor cleanup to ifu. 2022-01-14 11:13:06 -06:00
Ross Thompson
5726b5b640 Added support for logic memory in the IFU and LSU. This disables the bus interface. Peripherals do not work. Also requires using testbench-harvard.sv. I hope to merge this testbench with the main testbench.sv soon. 2022-01-13 22:21:43 -06:00
Ross Thompson
9f7e3f147b Partial local dtim in lsu configuration. 2022-01-13 17:50:31 -06:00
Ross Thompson
ecd3912900 Set rv32ic to not use icache. 2022-01-12 14:10:09 -06:00
David Harris
50c17f2a03 Removed unused coremark_bare 2022-01-10 05:05:55 +00:00
David Harris
467aac8463 Added riscvsingle. Removed unnecessary coremark config. Added compiler flags for Coremark. 2022-01-10 05:04:13 +00:00
Ross Thompson
888a60d8d6 Switched block for line in caches. 2022-01-04 22:08:18 -06:00
David Harris
115287adc8 Renamed wally-pipelined to pipelined 2022-01-04 19:47:41 +00:00