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Author SHA1 Message Date
Jacob Pease
ab00ea5a5c Added sd_read64 to help with block reads and crc checking. 2024-07-23 16:32:29 -05:00
Rose Thompson
57ea39d685 Fixed rvvi csr counting. 2024-07-23 16:22:23 -05:00
Rose Thompson
fe9ac36928 Fixed rvvi csr counting. 2024-07-23 16:22:23 -05:00
Rose Thompson
54e0289608 Fixed bugs in the rvvi synth logic which encoded csr instructions. 2024-07-23 16:16:11 -05:00
Rose Thompson
da2511c63c Fixed bugs in the rvvi synth logic which encoded csr instructions. 2024-07-23 16:16:11 -05:00
Jacob Pease
a95106b516 Progress made on implementing new disk read function. 2024-07-23 15:47:23 -05:00
Jacob Pease
57eeba5c8c Progress made on implementing new disk read function. 2024-07-23 15:47:23 -05:00
Jacob Pease
db13ed63b9 Removed references to card_type. 2024-07-23 15:46:18 -05:00
Jacob Pease
9ccb0eb027 Removed references to card_type. 2024-07-23 15:46:18 -05:00
Jacob Pease
2c35790359 Merge branch 'main' of github.com:openhwgroup/cvw into spiboot 2024-07-23 14:18:50 -05:00
Jacob Pease
d9afaade03 Merge branch 'main' of github.com:openhwgroup/cvw into spiboot 2024-07-23 14:18:50 -05:00
Jacob Pease
188df61037 Added uart print functions and the Wally banner. SD card can now be initialized. Removed old code from boot.c 2024-07-23 14:18:42 -05:00
Jacob Pease
bf65cd2817 Added uart print functions and the Wally banner. SD card can now be initialized. Removed old code from boot.c 2024-07-23 14:18:42 -05:00
Rose Thompson
1eff86b7ae Down to 3 verilator warnings in rvvisynth and a 40 warnings in verilog-ethernet. 2024-07-23 13:18:03 -05:00
Rose Thompson
7bc04702a7 Down to 3 verilator warnings in rvvisynth and a 40 warnings in verilog-ethernet. 2024-07-23 13:18:03 -05:00
Rose Thompson
c463201d68 Moved all rvvi files to rvvi directory. 2024-07-23 13:03:21 -05:00
Rose Thompson
f20b82b14e Moved all rvvi files to rvvi directory. 2024-07-23 13:03:21 -05:00
Rose Thompson
825dbefcb2 Fixed bus width error. Have to check this FPGA to make sure this didn't break anything. 2024-07-23 12:26:03 -05:00
Rose Thompson
d706b5b898 Fixed bus width error. Have to check this FPGA to make sure this didn't break anything. 2024-07-23 12:26:03 -05:00
Rose Thompson
bb74a0f96b Resolved more lint errors in the rvvi synthesized hardware. 2024-07-23 12:23:04 -05:00
Rose Thompson
b30656447f Resolved more lint errors in the rvvi synthesized hardware. 2024-07-23 12:23:04 -05:00
Rose Thompson
42f2469ea7
Merge pull request #891 from davidharrishmc/dev 
Increased covergen.py functional coverage to 87.6%
 2024-07-23 09:34:13 -05:00
Rose Thompson
ebd8082508 Merge pull request #891 from davidharrishmc/dev 
Increased covergen.py functional coverage to 87.6%
 2024-07-23 09:34:13 -05:00
David Harris
a4a0a10879 Increased covergen.py functional coverage to 87.6% 2024-07-23 04:38:13 -07:00
David Harris
b7fb786749 Increased covergen.py functional coverage to 87.6% 2024-07-23 04:38:13 -07:00
Jordan Carlin
37046f4ff3 Fix minimum scipy version for Ubuntu20.04 2024-07-23 01:03:10 -07:00
Jordan Carlin
36ffeb2dca
Fix minimum scipy version for Ubuntu20.04 2024-07-23 01:03:10 -07:00
Jordan Carlin
23ceb2532e Fix python version for Ubuntu 20.04 2024-07-23 00:16:27 -07:00
Jordan Carlin
d096e2e4f8
Fix python version for Ubuntu 20.04 2024-07-23 00:16:27 -07:00
Jordan Carlin
9dad0aea1d Add logs and reduce console output 2024-07-22 23:13:38 -07:00
Jordan Carlin
e4c38dd766
Add logs and reduce console output 2024-07-22 23:13:38 -07:00
Jordan Carlin
2c08406b7f Update python versions 2024-07-22 23:12:48 -07:00
Jordan Carlin
d045fb6662
Update python versions 2024-07-22 23:12:48 -07:00
Jordan Carlin
a2b9e34682 Use requirements file for pip packages 2024-07-22 23:12:27 -07:00
Jordan Carlin
16dd728ed6
Use requirements file for pip packages 2024-07-22 23:12:27 -07:00
Jordan Carlin
f20edbf22e Add DEBIAN_FRONTEND=noninteractive to apt 2024-07-22 23:11:33 -07:00
Jordan Carlin
4e8cc68d3e
Add DEBIAN_FRONTEND=noninteractive to apt 2024-07-22 23:11:33 -07:00
Jordan Carlin
23b7d2059f Update section header function usage 2024-07-22 23:10:45 -07:00
Jordan Carlin
8c8e1a3fef
Update section header function usage 2024-07-22 23:10:45 -07:00
Rose Thompson
94a1ce32e7 Merge branch 'main' of https://github.com/openhwgroup/cvw 2024-07-22 17:48:34 -05:00
Rose Thompson
c6c2240630 Merge branch 'main' of https://github.com/openhwgroup/cvw 2024-07-22 17:48:34 -05:00
Rose Thompson
8ca565ed53 Updated for a better ILA rvvi debugger. 2024-07-22 17:44:04 -05:00
Rose Thompson
5381e1f395 Updated for a better ILA rvvi debugger. 2024-07-22 17:44:04 -05:00
Jacob Pease
ef1f55626c Added sd_cmd and utility SPI functions. 2024-07-22 16:57:04 -05:00
Jacob Pease
b05052311f Added sd_cmd and utility SPI functions. 2024-07-22 16:57:04 -05:00
Rose Thompson
121342f4cc Updated the verilog-ethernet repo to remove most of the warnings. Updated the fpga constraints so the ILA is more useful when using RVVI. 2024-07-22 16:12:06 -05:00
Rose Thompson
3c06556833 Updated the verilog-ethernet repo to remove most of the warnings. Updated the fpga constraints so the ILA is more useful when using RVVI. 2024-07-22 16:12:06 -05:00
Jacob Pease
c50df29e58 Merge branch 'main' of github.com:openhwgroup/cvw into spiboot 2024-07-22 13:06:05 -05:00
Jacob Pease
6a9141e3be Merge branch 'main' of github.com:openhwgroup/cvw into spiboot 2024-07-22 13:06:05 -05:00
Jacob Pease
4585ad8891 Added new SDC clock constraint. 2024-07-22 13:05:16 -05:00