Commit Graph

5577 Commits

Author SHA1 Message Date
Ross Thompson
486148b45d Fixed batch mode regression test to work with hpmc loggic.
Added logic to exclude the embench warmups from preformance counters.
2023-03-03 14:59:20 -06:00
Ross Thompson
0ecd1ef681 Setup the testbench to exclude the warmup from performance counter reports. 2023-03-03 13:10:01 -06:00
Ross Thompson
e70492ea3f Added performance new counter prints to testbench. 2023-03-03 10:42:52 -06:00
David Harris
27f669118d Merge pull request #124 from ross144/main
Added additional performance counters.  Ch 5 is update todate with these changes.
2023-03-03 06:15:49 -08:00
Ross Thompson
dc49c2612d Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-03 00:22:27 -06:00
Ross Thompson
0cb5369351 Renamed BTB misprediction to BTA. 2023-03-03 00:18:34 -06:00
Ross Thompson
5b5677ccb8 Added divide cycle counter. 2023-03-02 23:59:52 -06:00
Ross Thompson
aabb454d1c Added the i and d cache cycle counters. 2023-03-02 23:54:56 -06:00
Ross Thompson
cfca77172e Added fence counter. 2023-03-02 23:29:20 -06:00
Ross Thompson
f32f8c109a Added csr write counter, sfence vma counter, interrupt counter, and exception counter. 2023-03-02 23:21:29 -06:00
Ross Thompson
a313b10912 Added store stall to performance counters. 2023-03-02 23:10:54 -06:00
Ross Thompson
2dd693a3b3 Reordered performance counters and added space for new ones. 2023-03-02 23:04:31 -06:00
Ross Thompson
724f2634c5 Fixed bug in performance counter script. 2023-03-02 22:32:13 -06:00
Ross Thompson
1f3639bff6 Added support for branch target buffer stats. 2023-03-02 22:16:30 -06:00
Ross Thompson
9bd6851ed5 Merge pull request #123 from eroom1966/main
fix the memory map privileges in the REF model view
2023-03-02 09:27:35 -06:00
eroom1966
fe4d9d3e37 fix the memory map privileges in the REF model view 2023-03-02 15:25:27 +00:00
Ross Thompson
b98e007a53 Cleaned up branch predictor performance counters. 2023-03-01 17:05:42 -06:00
David Harris
a7b15c4503 Merge pull request #121 from ross144/main
Branch predictor cleanup.  Chapter 10 now matches the hardware
2023-03-01 09:57:59 -08:00
Ross Thompson
90b2f0a652 Set bp to use instruction class prediction by default. 2023-03-01 11:52:42 -06:00
Ross Thompson
dea6b643a6 Branch predictor cleanup.
I think Ch 10 is now done except for BTB performance analysis and the section on running benchmarks and collecting data.
2023-03-01 11:24:24 -06:00
Ross Thompson
03a6679ba0 More btb cleanup. 2023-03-01 10:47:00 -06:00
Ross Thompson
554e7d0973 Minor fix to btb. 2023-03-01 10:45:40 -06:00
Ross Thompson
093d190c9a Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-01 10:04:13 -06:00
Ross Thompson
6880a052e0 Merge pull request #119 from eroom1966/main
update ImperasDV testbench for memory privileges
2023-03-01 09:50:00 -06:00
Ross Thompson
f141ec2777 Merge pull request #118 from davidharrishmc/dev
Pulled to latest commit of riscv-arch-test
2023-03-01 09:49:19 -06:00
eroom1966
f86a12f282 update testbench for memory privileges
also update configuration to define value of mimpid
2023-03-01 15:37:11 +00:00
Ross Thompson
a6917d07f3 Name cleanup. 2023-02-28 17:48:58 -06:00
David Harris
906e74dac2 Pulled to latest commit of riscv-arch-test 2023-02-28 15:03:59 -08:00
Ross Thompson
4c0e7f297a Found the performance bug with the branch predictor btb power saving update. 2023-02-28 15:57:34 -06:00
Ross Thompson
2ebe600f54 Name changes to reflect diagrams. 2023-02-28 15:37:25 -06:00
Ross Thompson
be4823f7dd Undid the btb update as it reduces performance. 2023-02-28 15:21:56 -06:00
Ross Thompson
9dd3379744 This icpred and btb changes are causing a performance issue. 2023-02-27 20:00:50 -06:00
Ross Thompson
544abe2819 Modified the BTB to save power by not updating when the prediction is unchanged. 2023-02-27 17:37:29 -06:00
Ross Thompson
bc5aecf948 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-02-27 09:48:03 -06:00
Ross Thompson
c5d98d5465 Merge pull request #117 from davidharrishmc/dev
ZMMUL support and MMU cleanup
2023-02-27 09:46:40 -06:00
David Harris
cf8b5f0783 Added support for ZMMUL 2023-02-27 07:29:53 -08:00
Ross Thompson
318189e5e6 Signal name changes. 2023-02-27 00:39:19 -06:00
David Harris
f40352e82b hptw typo fix 2023-02-26 19:38:34 -08:00
Ross Thompson
c89812b2d4 Branch predictor cleanup. 2023-02-26 21:28:36 -06:00
David Harris
e9ad6ae057 Simplified Access fault logic in HPTW 2023-02-26 18:50:37 -08:00
David Harris
5ae3dd77f9 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-02-26 18:35:14 -08:00
David Harris
2d7145901b StoreAmo faults are generated instead of load faults on AMO operations 2023-02-26 18:35:10 -08:00
Ross Thompson
e8c5e5b5ff Create module for instruction class prediction and decoding. 2023-02-26 20:20:30 -06:00
Ross Thompson
3964ce3309 Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-02-26 19:58:24 -06:00
David Harris
21b28fd1bb Renamed DAPageFault to UpdateDA 2023-02-26 17:51:45 -08:00
David Harris
4274071333 renamed UpperBitsUnequalPageFault to UpperBitsUnequal 2023-02-26 17:32:34 -08:00
David Harris
06bd4783af moved tlb to subdirectory 2023-02-26 17:31:03 -08:00
David Harris
c774b44116 Moved TLB into subdirectory of MMU 2023-02-26 17:28:05 -08:00
Ross Thompson
ad462388cb Merge pull request #116 from davidharrishmc/dev
Removed unneeded TLBFlush from TLBMiss logic
2023-02-26 12:07:41 -06:00
Ross Thompson
72be4318b8 Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-02-26 12:06:06 -06:00