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1,264 Commits 4 Branches 2 Tags 53 MiB
45a6e96673
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63 Commits

Author SHA1 Message Date
James E. Stine
45a6e96673 mod 2 of fpdivsqrt update 2021-07-13 16:59:17 -04:00
James E. Stine
d695be3ad0 Update fpdivsqrt item until move into uarch 2021-07-13 16:53:20 -04:00
Katherine Parry
acdd2e4504 Fixed writting MStatus FS bits 2021-07-13 13:20:30 -04:00
Katherine Parry
a4bd128978 fcvt.sv cleanup 2021-07-11 21:30:01 -04:00
Katherine Parry
0cc07fda1b Almost all convert instructions pass Imperas tests 2021-07-11 18:06:33 -04:00
David Harris
e65fb5bb35 Added F_SUPPORTED flag to disable floating point unit when not in MISA 2021-07-05 10:30:46 -04:00
David Harris
b8b7fab02b Fixed disabling MulDiv when not supported. Started adding generate for FPU unsupported 2021-07-04 19:33:46 -04:00
David Harris
c016ab8e58 Commented out some unused modules 2021-07-04 01:40:27 -04:00
Katherine Parry
72406b8a88 FPU update - missing files 2021-07-02 12:53:05 -04:00
Katherine Parry
3f61e313d2 FPU update 2021-07-02 12:40:58 -04:00
Katherine Parry
6216bd7172 FPU control signals changed and FMA works 2021-06-28 18:53:58 -04:00
Katherine Parry
bc8d660bc5 FPU forwarding reworked pt.1 2021-06-24 18:39:18 -04:00
Katherine Parry
44af47608c fpu clean-up 2021-06-23 16:42:40 -04:00
Katherine Parry
9eb6eb40bf rv64f FLW passes imperas tests 2021-06-22 16:36:16 -04:00
Katherine Parry
26bad083ad all rv64f instructions except convert, divide, square root, and FLD pass 2021-06-20 20:24:09 -04:00
Katherine Parry
920ff984ca Updated FMA 2021-06-14 13:42:53 -04:00
James E. Stine
171a6728b0 Put repository of fpdivsqrt with RTL-based adder instead of structural implementation 2021-06-11 14:35:22 -04:00
Katherine Parry
b55798f09b lint is clean 2021-06-07 14:22:54 -04:00
Katherine Parry
e4db6ea6f5 fixed lint warnings for fpu and lzd 2021-06-05 12:06:33 -04:00
Katherine Parry
19116ed889 Double-precision FMA instructions 2021-06-04 14:00:11 -04:00
Ross Thompson
db2a38c300 Fixed a few lint errors, 
clock gater was wrong,
missing signal definitions in branch predictor.
 2021-06-02 09:33:24 -05:00
James E. Stine
2c140679e3 Minor cosmetic update to fpu.sv 2021-06-01 15:45:32 -04:00
Ross Thompson
8e330367ac added clock gater to floating point divider to speed up simulation time. 2021-06-01 13:46:21 -05:00
Katherine Parry
0646e08609 classify unit created and passes imperas tests 2021-05-27 18:53:55 -04:00
Katherine Parry
65eca433b6 All compare instructions pass imperas tests 2021-05-27 15:23:28 -04:00
Katherine Parry
bd05de0dbb FADD and FSUB imperas tests pass 2021-05-26 12:33:33 -04:00
James E. Stine
e3b3321f91 delete old file for FPregfile 2021-05-26 09:13:09 -05:00
James E. Stine
cc2a7ced7f Add regression test for fpadd 2021-05-26 09:12:37 -05:00
Katherine Parry
3869a73a9c renamed top level FPU wires 2021-05-25 20:04:34 -04:00
James E. Stine
e32e812f6a Update FPregfile to use more compact code and better structure for ease in reading 2021-05-25 13:21:59 -05:00
Katherine Parry
03aea055fa FMV.X.D imperas test passes 2021-05-24 14:44:30 -04:00
James E. Stine
194c32defa Update header for FPadd 2021-05-24 08:28:16 -05:00
Katherine Parry
55f22979ca FSD and FLD imperas tests pass 2021-05-23 18:33:14 -04:00
Katherine Parry
71e4a10efb FMV.D.X imperas test passes 2021-05-20 22:17:59 -04:00
Katherine Parry
409438bc95 floating point infinite loop removed from imperas tests 2021-05-18 10:42:51 -04:00
Katherine Parry
3f05e31954 fpu warnings fixed/commented 2021-05-03 19:17:09 +00:00
Katherine Parry
9252d08b41 fpu imperas tests run 2021-05-01 02:18:01 +00:00
Thomas Fleming
c055ab272d Clean up lint errors in fpu and muldiv 
booth.sv had an actual error where a signal was being assigned to too
many bits. muldiv has a lot of non blocking assignments, so I suppressed
those warnings so the linter output was readable.
 2021-04-22 15:36:03 -04:00
Teo Ene
008b308b79 Fixed most relevant remaining synthesis compilation warnings with Ben 2021-04-21 16:06:27 -05:00
Katherine Parry
204e5cb018 fixed synth bugs in fpu 2021-04-19 00:39:16 +00:00
Katherine Parry
0bdd3efdd5 integraded the FMA into the FPU 2021-04-15 18:28:00 +00:00
Katherine Parry
e075dc2d13 Various bugs fixed in FMA 2021-04-13 18:27:13 +00:00
Teo Ene
0bffac2c74 Various code syntax changes to bring HDL to a synthesizable level 2021-04-13 11:27:12 -05:00
Katherine Parry
08f45eb076 fixed FPU lint warnings 2021-04-08 18:03:21 +00:00
Katherine Parry
ebf4915440 fixed FPU lint warnings 2021-04-08 17:55:25 +00:00
Katherine Parry
f41b5a2d38 Added missing files in FPU 2021-04-04 18:09:13 +00:00
Katherine Parry
08b31f7b2a Integrated FPU 2021-04-03 20:52:26 +00:00
Brett Mathis
aedc96cd04 FPU Pipeline completed - can begin integration 2021-03-25 13:29:03 -05:00
Katherine Parry
123e63b440 fixed various bugs in the FMA 2021-03-24 21:51:17 +00:00
Katherine Parry
fb78dedae2 fixed various bugs in the FMA 2021-03-24 01:35:32 +00:00