206 Commits

Author	SHA1	Message	Date
Jarred Allen	4410944049	Merge branch 'main' into cache	2021-03-23 23:35:36 -04:00
Katherine Parry	56dc8de009	fixed various bugs in the FMA	2021-03-24 01:35:32 +00:00
Jarred Allen	d6ecc3ede0	Begin work on direct-mapped cache	2021-03-23 17:03:02 -04:00
Teo Ene	ef3d2dda48	Added BOOTTIM to InstrAccessFaultF calculation in uncore/imem	2021-03-23 15:21:13 -05:00
Shreya Sanghai	1d6a2989ed	PC counts branch instructions	2021-03-23 14:25:51 -04:00
Jarred Allen	0f8fe8fb3b	Document some internal signals	2021-03-23 00:10:35 -04:00
Jarred Allen	6ffa01cc4d	Add comments explaining icache inputs	2021-03-23 00:07:39 -04:00
Jarred Allen	827993598d	Small commit to see if new hook tests non-main branch	2021-03-22 23:57:01 -04:00
Noah Boorstin	15474f678d	Merge branch 'main' into cache	2021-03-22 23:28:30 -04:00
bbracker	5efd5958e7	added delays to uart AHB signals	2021-03-22 15:40:29 -04:00
Jarred Allen	6ce52f9b80	Remove DelaySideD since it isn't needed	2021-03-22 15:13:23 -04:00
Jarred Allen	b871bfe714	Update icache interface	2021-03-22 15:04:46 -04:00
Jarred Allen	3748d03adc	Merge branch 'main' into cache	2021-03-22 13:47:48 -04:00
bbracker	11d4a8ab34	first pass at PLIC interface	2021-03-22 10:14:21 -04:00
Katherine Parry	f741ba7702	fixed various bugs in the FMA	2021-03-21 22:53:04 +00:00
Jarred Allen	f9cf05a7d4	Fix bug with PC incrementing	2021-03-20 18:06:03 -04:00
Jarred Allen	a3a646d1a9	Merge branch 'main' into cache	2021-03-20 17:56:25 -04:00
Jarred Allen	a2bf5ac202	Fix another bug in the icache (why so many of them?)	2021-03-20 17:54:40 -04:00
Jarred Allen	c5f99c4a34	Revert "Change flop to listen to StallF" ... This reverts commit c8028710a5.	2021-03-20 17:34:19 -04:00
Jarred Allen	c8028710a5	Change flop to listen to StallF	2021-03-20 17:04:13 -04:00
Katherine Parry	e317e7511e	messy FMA rewrite using section 7.5.4 in The Handbook of Floating-Point Arithmetic	2021-03-20 02:05:16 +00:00
Jarred Allen	279c09b27c	Merge changes from main	2021-03-18 18:58:10 -04:00
bbracker	85363e941d	AHB bugfixes and sim waveview refactoring	2021-03-18 18:25:12 -04:00
bbracker	98e93a63c0	maybe AHB works now	2021-03-18 17:47:00 -04:00
Shreya Sanghai	bbe0957df5	Merge branch 'gshare' into main ... Conflicts: wally-pipelined/regression/wave.do	2021-03-18 17:25:48 -04:00
Ross Thompson	1091dd10c1	Switched to gshare from global history. ... Fixed a few minor bugs.	2021-03-18 16:05:59 -05:00
Ross Thompson	8f4051543c	Fixed minor bug with the size of gshare.	2021-03-18 16:00:09 -05:00
Shreya Sanghai	eb86bfc084	removed unnecesary PC registers in ifu	2021-03-18 16:31:21 -04:00
Thomas Fleming	8d484174a7	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2021-03-18 14:36:42 -04:00
Thomas Fleming	7f7597e667	Connect tlb, pagetablewalker, and memory	2021-03-18 14:35:46 -04:00
Noah Boorstin	bc1a0c6ee7	change ifndef to generate/if	2021-03-18 12:50:19 -04:00
Noah Boorstin	a2b0af460e	everyone gets a bootram	2021-03-18 12:35:37 -04:00
Shreya Sanghai	36f0631203	added gshare and global history predictor	2021-03-16 17:03:01 -04:00
Jarred Allen	a82aa23399	Fix icache for jumping into misaligned instructions	2021-03-16 16:57:51 -04:00
Shreya Sanghai	9eed875886	added global history branch predictor	2021-03-16 16:06:40 -04:00
Jarred Allen	2d2092e8ab	Merge remote-tracking branch 'origin/main' into cache	2021-03-16 14:17:39 -04:00
Shreya Sanghai	08e9149e20	made performance counters count branch misprediction	2021-03-16 11:24:17 -04:00
Shreya Sanghai	74f1641c5a	Merge branch 'counters' into main ... added a configurable number of performance counters	2021-03-16 11:01:30 -04:00
Jarred Allen	ac9fd5a323	Fix BEQZ tests	2021-03-14 15:42:27 -04:00
Jarred Allen	926235b180	Merge upstream changes	2021-03-14 14:57:53 -04:00
Jarred Allen	deb13f34bb	Get non-jump case working	2021-03-14 14:46:21 -04:00
bbracker	e58d17d5b7	slightly smarter dtim HREADY	2021-03-13 07:03:33 -05:00
bbracker	345254b5a3	slightly smarter dtim HREADY	2021-03-13 06:55:34 -05:00
bbracker	c5015e5809	imem rd2 adrbits bugfix	2021-03-13 00:10:41 -05:00
bbracker	f4fb546969	clint HREADY signal update	2021-03-12 20:23:55 -05:00
Ross Thompson	6ee97830f7	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2021-03-12 14:58:04 -06:00
Ross Thompson	7743d8edc3	Cleanup of the branch predictor flush and stall controls.	2021-03-12 14:57:53 -06:00
David Harris	865c103599	64-bit AMO debugged	2021-03-11 23:18:33 -05:00
Thomas Fleming	1294235837	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main ... Conflicts: wally-pipelined/src/ebu/ahblite.sv	2021-03-11 00:15:58 -05:00
David Harris	42275e92ed	Initial untested implementation of AMO instructions	2021-03-11 00:11:31 -05:00