Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity
7,087 Commits 5 Branches 2 Tags 53 MiB
3f7dd59910
Commit Graph

7087 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Ross Thompson
60609857a9 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-07-18 17:16:33 -05:00
Ross Thompson
3bf2b35704 Wow. The newest version of Vivado does not like the enums as parameters. 
The solution is simple.  I changed the type to logic [31:0] and defined macros for the branch predictor types as 32 bit integers.
 2023-07-18 15:07:10 -05:00
Kevin Kim
345ca6e1b9 combined int,fp test generation script update 2023-07-17 15:59:36 -07:00
Ross Thompson
930e00b69b Added new submodule for digilent fpga boards. 2023-07-17 16:25:37 -05:00
Ross Thompson
cc8826a15a Merge branch 'main' of github.com:ross144/cvw 2023-07-17 16:01:05 -05:00
Ross Thompson
a5f75d568b Added artya7 device tree. 2023-07-17 16:01:02 -05:00
Ross Thompson
5ce4ac963f Updated arty a7 fpga top. 2023-07-17 15:55:57 -05:00
Ross Thompson
c7283f8c83 Merge branch 'main' of github.com:ross144/cvw 2023-07-17 15:52:27 -05:00
Ross Thompson
80093a0eb1 Updated the FPGA zero stage bootloader. 2023-07-17 15:52:13 -05:00
David Harris
8c807ce3ef
Merge pull request #363 from ross144/main 
Fixed over logging issue with icache and dcache loggers.
 2023-07-15 06:19:11 -07:00
Ross Thompson
20751790f6 Fixed bug with performance counters not tracking the correct number of requested icache and dcache memory operations. 2023-07-14 16:31:44 -05:00
Ross Thompson
6ddd8d4e2b Fixed the icache and dcache overlogging issue. 2023-07-14 15:47:05 -05:00
Jacob Pease
142ec857ed Modified bootloader to access GUID partitions. SDC interrupt to PLIC. 
Since writing an SD card image generation script, the bootloader
needed to be altered to access individual binaries from specific
partitions. A new file, gpt.c with it's header gpt.h, have been added
to the bootloader to facilitate this.

The SDC has been added to the device tree for the VCU108
board. Additionally the SDC interrupt signal was added to the PLIC
node in the device tree. The PLIC itself  was modified to accept the
SDC interrupt signal.
 2023-07-14 13:36:44 -05:00
harshinisrinath
cba045b53c Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-07-13 13:00:58 -07:00
Ross Thompson
b4d9d2370c Somehow the Arty A7 device tree was missing. 2023-07-13 14:10:45 -05:00
Ross Thompson
de5cab2bc6 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-07-13 11:26:49 -05:00
Ross Thompson
cebcf1995c
Merge pull request #361 from davidharrishmc/dev 
Clean up privilege rs1 decoding and implement svinval as sfence.vma
 2023-07-13 12:26:30 -04:00
Kevin Kim
71172b8608 revert setup.sh to old 2023-07-13 08:28:51 -07:00
Kevin Kim
db5a138a56 removed custom tests 2023-07-13 08:24:29 -07:00
Kevin Kim
0cb8bb1d4b Merge branch 'divsqrtrem' of https://github.com/kipmacsaigoren/cvw into divsqrtrem 2023-07-13 08:15:24 -07:00
Kevin Kim
83983a4eb2 added new tests 2023-07-13 08:15:23 -07:00
Kevin Kim
71ecda4cd8
Merge branch 'openhwgroup:main' into divsqrtrem 2023-07-13 08:14:56 -07:00
Kevin Kim
dd79397b75 added name 2023-07-13 08:14:27 -07:00
David Harris
45667c9f4d Clean up privilege rs1 decoding and implement svinval as sfence.vma 2023-07-13 02:41:17 -07:00
David Harris
40ac1f7872
Merge pull request #360 from ross144/main 
Fixed the privilege decoder bug which prevented the fpga linux boot.
 2023-07-13 01:40:28 -07:00
Kevin Kim
e8b856bc42 divsqrt on unified unit is now called fdivremsqrt test 2023-07-12 19:58:39 -07:00
Kevin Kim
93c94c89b1 comments in testbench fp 2023-07-12 19:54:22 -07:00
Kevin Kim
e37e989ede testbench-fp code cleanup 2023-07-12 19:39:11 -07:00
Kevin Kim
f91d8c20e4 fixed bug where opctrl not changing when running several intdivrem tests 2023-07-12 19:26:05 -07:00
Ross Thompson
96b8f34d1a Got xcelium running wally, but it fails to actually preload the memories. 2023-07-12 13:56:57 -05:00
Ross Thompson
add1a6996e Merge branch 'main' of github.com:ross144/cvw 2023-07-11 15:09:07 -05:00
Ross Thompson
f30c92e82a Added wfi and interrupt to tracer. 2023-07-11 15:09:04 -05:00
Ross Thompson
58dfc15844 Merge branch 'main' of github.com:ross144/cvw into main 2023-07-11 15:08:26 -05:00
Ross Thompson
c12bc4f435 Created separate temporary testbench for xcelium. 2023-07-11 15:07:33 -05:00
Ross Thompson
b26dc6db7f Simplificaiton of function tracker. 2023-07-11 10:51:17 -05:00
Ross Thompson
05b1cce2d1 RTL changes for Xcelium. 2023-07-11 10:51:02 -05:00
Kevin Kim
5fb862639d more bug fixes in testbench-fp 2023-07-10 16:43:54 -07:00
Ross Thompson
e647937b27 Fixed the privilege decoder bug which prevented the fpga linux boot. 2023-07-10 17:00:06 -05:00
Ross Thompson
47ee92d6e5
Merge pull request #359 from davidharrishmc/dev 
CSR updates
 2023-07-10 13:16:57 -04:00
Kevin Kim
05c2bd88df remw works 2023-07-09 23:20:18 -07:00
Kevin Kim
2a68e4a065 bug fixes in opctrl and test selection 2023-07-09 22:23:39 -07:00
Kevin Kim
8ea98c52cf divremsqrt passes int64 and rem64!! 2023-07-09 21:00:47 -07:00
David Harris
c91bbc3ca8 MENVCFG only exists if U_SUPPORTED 2023-07-09 18:25:07 -07:00
Kevin Kim
9343c2296e testbench now compiles with basic infrastructure to do int64rem test on drsu 2023-07-08 20:42:16 -07:00
David Harris
77e0bdba50
Merge pull request #358 from ross144/main 
Fixes the FPGA linux boot after parameterization.  Note commit 4d1ddd0c breaks the FPGA again
 2023-07-07 17:09:57 -07:00
Ross Thompson
4e54e5169b Changes for xcelium. 2023-07-07 18:22:28 -05:00
Ross Thompson
74834bde2c Removed duplicate signal name from testbench. 2023-07-07 16:34:08 -05:00
Ross Thompson
850d8c2b24 Fixed slight bug in config from parameterization. 2023-07-07 16:33:34 -05:00
Ross Thompson
da499aafc0 Merge branch 'main' of github.com:ross144/cvw 2023-07-07 13:25:00 -05:00
Kevin Kim
23bb96f857 divremsqrt now includes f64 2023-07-06 21:23:46 -07:00