mirror of
https://github.com/openhwgroup/cvw
synced 2025-02-11 06:05:49 +00:00
Wow. The newest version of Vivado does not like the enums as parameters.
The solution is simple. I changed the type to logic [31:0] and defined macros for the branch predictor types as 32 bit integers.
This commit is contained in:
parent
930e00b69b
commit
3bf2b35704
@ -138,7 +138,7 @@ localparam PLIC_UART_ID = 32'd10;
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localparam PLIC_GPIO_ID = 32'd3;
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localparam BPRED_SUPPORTED = 1;
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localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_SIZE = 32'd10;
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localparam BPRED_NUM_LHR = 32'd6;
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localparam BTB_SIZE = 32'd10;
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@ -151,7 +151,7 @@ localparam PLIC_GPIO_ID = 32'd3;
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localparam PLIC_UART_ID = 32'd10;
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localparam BPRED_SUPPORTED = 1;
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localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_NUM_LHR = 32'd6;
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localparam BPRED_SIZE = 32'd12;
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localparam BTB_SIZE = 32'd10;
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@ -139,7 +139,7 @@ localparam PLIC_GPIO_ID = 32'd3;
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localparam PLIC_UART_ID = 32'd10;
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localparam BPRED_SUPPORTED = 0;
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localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_SIZE = 32'd10;
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localparam BPRED_NUM_LHR = 32'd6;
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localparam BTB_SIZE = 32'd10;
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@ -140,7 +140,7 @@ localparam PLIC_GPIO_ID = 32'd3;
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localparam PLIC_UART_ID = 32'd10;
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localparam BPRED_SUPPORTED = 1;
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localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_SIZE = 32'd16;
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localparam BPRED_NUM_LHR = 32'd6;
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localparam BTB_SIZE = 32'd10;
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@ -139,7 +139,7 @@ localparam PLIC_GPIO_ID = 32'd3;
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localparam PLIC_UART_ID = 32'd10;
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localparam BPRED_SUPPORTED = 0;
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localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_SIZE = 32'd10;
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localparam BPRED_NUM_LHR = 32'd6;
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localparam BTB_SIZE = 32'd10;
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@ -138,7 +138,7 @@ localparam PLIC_GPIO_ID = 32'd3;
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localparam PLIC_UART_ID = 32'd10;
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localparam BPRED_SUPPORTED = 0;
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localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_SIZE = 32'd10;
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localparam BPRED_NUM_LHR = 32'd6;
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localparam BTB_SIZE = 32'd10;
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@ -141,7 +141,7 @@ localparam PLIC_GPIO_ID = 32'd3;
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localparam PLIC_UART_ID = 32'd10;
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localparam BPRED_SUPPORTED = 1;
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localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_SIZE = 32'd10;
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localparam BPRED_NUM_LHR = 32'd6;
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localparam BTB_SIZE = 32'd10;
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@ -144,7 +144,7 @@ localparam PLIC_GPIO_ID = 32'd3;
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localparam PLIC_UART_ID = 32'd10;
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localparam BPRED_SUPPORTED = 1;
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localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_NUM_LHR = 32'd6;
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localparam BPRED_SIZE = 32'd10;
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localparam BTB_SIZE = 32'd10;
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@ -141,7 +141,7 @@ localparam PLIC_GPIO_ID = 32'd3;
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localparam PLIC_UART_ID = 32'd10;
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localparam BPRED_SUPPORTED = 0;
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localparam BranchPredictorType BPRED_TYPE = BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_SIZE = 32'd10;
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localparam BPRED_NUM_LHR = 32'd6;
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localparam BTB_SIZE = 32'd10;
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@ -1,3 +1,8 @@
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typedef enum logic[3:0] {BP_TWOBIT, BP_GSHARE, BP_GLOBAL, BP_GSHARE_BASIC,
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BP_GLOBAL_BASIC, BP_LOCAL_BASIC, BP_LOCAL_AHEAD, BP_LOCAL_REPAIR} BranchPredictorType;
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`define BP_TWOBIT (32'd0)
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`define BP_GSHARE (32'd1)
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`define BP_GLOBAL (32'd2)
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`define BP_GSHARE_BASIC (32'd3)
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`define BP_GLOBAL_BASIC (32'd4)
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`define BP_LOCAL_BASIC (32'd5)
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`define BP_LOCAL_AHEAD (32'd6)
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`define BP_LOCAL_REPAIR (32'd7)
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@ -1,6 +1,8 @@
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// Populate parameter structure with values specific to the current configuration
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`include "BranchPredictorType.vh"
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parameter cvw_t P = '{
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FPGA : FPGA,
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QEMU : QEMU,
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@ -3,9 +3,9 @@ sdc_src := ~/repos/sdc.tar.gz
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# Select the desired board and the all build rules
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# vcu118
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export XILINX_PART := xcvu9p-flga2104-2L-e
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export XILINX_BOARD := xilinx.com:vcu118:part0:2.4
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export board := vcu118
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#export XILINX_PART := xcvu9p-flga2104-2L-e
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#export XILINX_BOARD := xilinx.com:vcu118:part0:2.4
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#export board := vcu118
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# vcu108
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#export XILINX_PART := xcvu095-ffva2104-2-e
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@ -13,15 +13,15 @@ export board := vcu118
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#export board := vcu108
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# Arty A7
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#export XILINX_PART := xc7a100tcsg324-1
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#export XILINX_BOARD := digilentinc.com:arty-a7-100:part0:1.1
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#export board := ArtyA7
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export XILINX_PART := xc7a100tcsg324-1
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export XILINX_BOARD := digilentinc.com:arty-a7-100:part0:1.1
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export board := ArtyA7
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# for Arty A7 and S7 boards
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#all: FPGA_Arty
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all: FPGA_Arty
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# VCU 108 and VCU 118 boards
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all: FPGA_VCU
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#all: FPGA_VCU
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FPGA_Arty: PreProcessFiles IP_Arty SDC
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vivado -mode tcl -source wally.tcl 2>&1 | tee wally.log
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@ -25,6 +25,7 @@
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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//`include "BranchPredictorType.vh"
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`include "config.vh"
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import cvw::*;
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@ -1,7 +1,7 @@
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#!/bin/bash
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tcpPort=1235
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imageDir=$RISCV/buildroot/output/images
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tvDir=$RISCV/linux-testvectors
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imageDir=/home/ross/repos/buildroot/output/images
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tvDir=linux-testvectors
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rawRamFile="$tvDir/ramGDB.bin"
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ramFile="$tvDir/ram.bin"
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rawBootmemFile="$tvDir/bootmemGDB.bin"
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@ -36,7 +36,7 @@ then
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echo "Launching QEMU in replay mode!"
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(qemu-system-riscv64 \
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-M virt -dtb $RISCV/buildroot/output/images/wally-virt.dtb \
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-M virt -dtb /home/ross/repos/buildroot/output/images/wally-artya7.dtb \
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-nographic \
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-bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio \
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-gdb tcp::$tcpPort -S) \
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@ -144,7 +144,7 @@ typedef struct packed {
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int PLIC_UART_ID;
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logic BPRED_SUPPORTED;
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BranchPredictorType BPRED_TYPE;
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logic [31:0] BPRED_TYPE;
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int BPRED_NUM_LHR;
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int BPRED_SIZE;
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int BTB_SIZE;
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@ -27,6 +27,8 @@
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////////////////////////////////////////////////////////////////////////////////////////////////
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`define INSTR_CLASS_PRED 1
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`include "BranchPredictorType.vh"
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module bpred import cvw::*; #(parameter cvw_t P) (
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input logic clk, reset,
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@ -96,45 +98,45 @@ module bpred import cvw::*; #(parameter cvw_t P) (
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logic [P.XLEN-1:0] BPBTAE;
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// Part 1 branch direction prediction
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if (P.BPRED_TYPE == BP_TWOBIT) begin:Predictor
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if (P.BPRED_TYPE == `BP_TWOBIT) begin:Predictor
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twoBitPredictor #(P, P.XLEN, P.BPRED_SIZE) DirPredictor(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW,
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.FlushD, .FlushE, .FlushM, .FlushW,
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.PCNextF, .PCM, .BPDirPredF, .BPDirPredWrongE,
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.BranchE, .BranchM, .PCSrcE);
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end else if (P.BPRED_TYPE == BP_GSHARE) begin:Predictor
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end else if (P.BPRED_TYPE == `BP_GSHARE) begin:Predictor
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gshare #(P, P.XLEN, P.BPRED_SIZE) DirPredictor(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
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.PCNextF, .PCF, .PCD, .PCE, .PCM, .BPDirPredF, .BPDirPredWrongE,
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.BPBranchF, .BranchD, .BranchE, .BranchM, .BranchW,
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.PCSrcE);
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end else if (P.BPRED_TYPE == BP_GLOBAL) begin:Predictor
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end else if (P.BPRED_TYPE == `BP_GLOBAL) begin:Predictor
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gshare #(P, P.XLEN, P.BPRED_SIZE, 0) DirPredictor(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
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.PCNextF, .PCF, .PCD, .PCE, .PCM, .BPDirPredF, .BPDirPredWrongE,
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.BPBranchF, .BranchD, .BranchE, .BranchM, .BranchW,
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.PCSrcE);
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end else if (P.BPRED_TYPE == BP_GSHARE_BASIC) begin:Predictor
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end else if (P.BPRED_TYPE == `BP_GSHARE_BASIC) begin:Predictor
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gsharebasic #(P, P.XLEN, P.BPRED_SIZE) DirPredictor(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
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.PCNextF, .PCM, .BPDirPredF, .BPDirPredWrongE,
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.BranchE, .BranchM, .PCSrcE);
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end else if (P.BPRED_TYPE == BP_GLOBAL_BASIC) begin:Predictor
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end else if (P.BPRED_TYPE == `BP_GLOBAL_BASIC) begin:Predictor
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gsharebasic #(P, P.XLEN, P.BPRED_SIZE, 0) DirPredictor(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
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.PCNextF, .PCM, .BPDirPredF, .BPDirPredWrongE,
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.BranchE, .BranchM, .PCSrcE);
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end else if (P.BPRED_TYPE == BP_LOCAL_BASIC) begin:Predictor
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end else if (P.BPRED_TYPE == `BP_LOCAL_BASIC) begin:Predictor
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localbpbasic #(P, P.XLEN, P.BPRED_NUM_LHR, P.BPRED_SIZE) DirPredictor(.clk, .reset,
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.StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
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.PCNextF, .PCM, .BPDirPredF, .BPDirPredWrongE,
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.BranchE, .BranchM, .PCSrcE);
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end else if (P.BPRED_TYPE == BP_LOCAL_AHEAD) begin:Predictor
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end else if (P.BPRED_TYPE == `BP_LOCAL_AHEAD) begin:Predictor
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localaheadbp #(P, P.XLEN, P.BPRED_NUM_LHR, P.BPRED_SIZE) DirPredictor(.clk, .reset,
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.StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
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.PCNextF, .PCM, .BPDirPredD(BPDirPredF), .BPDirPredWrongE,
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.BranchE, .BranchM, .PCSrcE);
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end else if (P.BPRED_TYPE == BP_LOCAL_REPAIR) begin:Predictor
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end else if (P.BPRED_TYPE == `BP_LOCAL_REPAIR) begin:Predictor
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localrepairbp #(P, P.XLEN, P.BPRED_NUM_LHR, P.BPRED_SIZE) DirPredictor(.clk, .reset,
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.StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
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.PCNextF, .PCE, .PCM, .BPDirPredD(BPDirPredF), .BPDirPredWrongE,
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@ -328,7 +328,7 @@ module testbench;
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if (P.UNCORE_RAM_SUPPORTED) `define TB_UNCORE_RAM_SUPPORTED;
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if (P.BPRED_SUPPORTED) `define TB_BPRED_SUPPORTED;
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if (P.BPRED_TYPE == BP_LOCAL_AHEAD | P.BPRED_TYPE == BP_LOCAL_REPAIR) `define TB_BHT;
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if (P.BPRED_TYPE == `BP_LOCAL_AHEAD | P.BPRED_TYPE == `BP_LOCAL_REPAIR) `define TB_BHT;
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always @(posedge clk) begin
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if (ResetMem) // program memory is sometimes reset
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@ -342,7 +342,7 @@ module testbench;
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if (P.BPRED_SUPPORTED) begin
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`ifdef TB_BPRED_SUPPORTED
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// local history only
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if (P.BPRED_TYPE == BP_LOCAL_AHEAD | P.BPRED_TYPE == BP_LOCAL_REPAIR) begin
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if (P.BPRED_TYPE == `BP_LOCAL_AHEAD | P.BPRED_TYPE == `BP_LOCAL_REPAIR) begin
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`ifdef TB_BHT
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for(adrindex = 0; adrindex < 2**P.BPRED_NUM_LHR; adrindex++)
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dut.core.ifu.bpred.bpred.Predictor.DirPredictor.BHT.mem[adrindex] = 0;
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@ -27,6 +27,7 @@
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`include "config.vh"
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`include "tests.vh"
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`include "BranchPredictorType.vh"
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import cvw::*;
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@ -332,7 +333,7 @@ module testbench;
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if(reset) begin // branch predictor must always be reset
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if (P.BPRED_SUPPORTED) begin
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// local history only
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if (P.BPRED_TYPE == BP_LOCAL_AHEAD | P.BPRED_TYPE == BP_LOCAL_REPAIR)
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if (P.BPRED_TYPE == `BP_LOCAL_AHEAD | P.BPRED_TYPE == `BP_LOCAL_REPAIR)
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for(adrindex = 0; adrindex < 2**P.BPRED_NUM_LHR; adrindex++)
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dut.core.ifu.bpred.bpred.Predictor.DirPredictor.BHT.mem[adrindex] = 0;
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for(adrindex = 0; adrindex < 2**P.BTB_SIZE; adrindex++)
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