Commit Graph

19 Commits

Author SHA1 Message Date
Rose Thompson
3e5aa77b5d Merge branch 'main' into Zicclsm 2023-11-02 12:55:51 -05:00
David Harris
4d191e63cc Fixed test cases for medeleg issue 444. Also added a COMPRESSED_SUPPORTED parameter true when C or Zca is supported, and use this to get compressed hardware such as the spill logic and the +2 adder. 2023-10-30 09:56:17 -07:00
Rose Thompson
ff85832454 Addec ZICCLSM to config files and started on lsu instance. 2023-10-27 13:07:23 -05:00
David Harris
d80cb36778 Added ZCA/ZCF/ZCD/ZCB support. Doesn't break regression, but not tested. Need to get tests for Zcb. Draft tests are in riscv-arch-test but not yet committed there 2023-10-04 12:28:12 -07:00
Ross Thompson
1a003019d6 Actually fixed non-power of 2 issue with RAS.
Added RAS swapping to branch predictor scripts and configurations.
2023-09-27 12:25:05 -05:00
Kevin Kim
9217e1e767 synth works 2023-08-26 21:11:21 -07:00
David Harris
9f44241d0f Added N and PBMT bits to MMU PTE 2023-08-24 19:44:46 -07:00
Ross Thompson
717833b11a Removed all old references to the old flash card controller.
Added git submodule for the flash card in addins.
Replicated flash card top level for our changes into the fpga/src directory.
2023-07-24 15:45:57 -05:00
Ross Thompson
3eeecd2f27 Merge branch 'boot' into mergeBoot
Merges Jacob's new sdc controller into wally.
2023-07-21 17:43:45 -05:00
Ross Thompson
0e22fe5231 Removed QEMU from configurations. 2023-07-19 10:23:55 -05:00
Ross Thompson
3bf2b35704 Wow. The newest version of Vivado does not like the enums as parameters.
The solution is simple.  I changed the type to logic [31:0] and defined macros for the branch predictor types as 32 bit integers.
2023-07-18 15:07:10 -05:00
David Harris
45667c9f4d Clean up privilege rs1 decoding and implement svinval as sfence.vma 2023-07-13 02:41:17 -07:00
Ross Thompson
a55bcad5c1 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-06-15 14:57:23 -05:00
David Harris
b15c5e2a51 Added support for menvcfg and senvcfg, including menvcfg.STCE for supervisor timer compare 2023-06-09 14:40:01 -07:00
David Harris
d674c9b45c Other Wally cleanup 2023-06-09 09:37:09 -07:00
Ross Thompson
80cdb02d43 Changes required to make verilator compile wally's testbench to c++. Not actually tested in simulation yet. 2023-05-31 16:51:00 -05:00
Ross Thompson
e56497101a Updated source code to be compatible with verilator 5.011 for lint only. 2023-05-31 10:44:23 -05:00
Ross Thompson
340aac0934 Got the branch predictor parameterized using Lim's method. Also had to add a global enum included in both cvw.sv and the configs which defines the branch predictor types. This should be synthesizable, but I'll need to double check. 2023-05-26 16:00:14 -05:00
Ross Thompson
c5aeb08e5c Trying to figure out why the parameterization slowed down modelsim so much. 2023-05-24 12:44:42 -05:00