David Harris
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f21582906f
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Pushing HPTWPAdrM flop into LSUArb
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2021-07-17 19:39:18 -04:00 |
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David Harris
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9741b01465
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hptw: minor cleanup
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2021-07-17 13:40:12 -04:00 |
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Ross Thompson
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d3715acf2d
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Fixed walker fault interaction with dcache.
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2021-07-16 12:22:13 -05:00 |
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Ross Thompson
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5ca7dc619c
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Updated the ptw, lsuarb and dcache to hopefully solve the interlock issues.
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2021-07-16 11:12:57 -05:00 |
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Ross Thompson
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6163629204
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Finally have the ptw correctly walking through the dcache to update the itlb.
Still not working fully.
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2021-07-14 22:26:07 -05:00 |
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Ross Thompson
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771c7ff130
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Routed CommittedM and PendingInterruptM through the lsu arb.
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2021-07-14 16:18:09 -05:00 |
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Ross Thompson
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b6e5670bc3
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Added CommitedM to data cache output.
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2021-07-13 22:43:42 -05:00 |
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Ross Thompson
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6abd23a61d
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Lint passes, but I only hope to have loads working. Stores, lr/sc, atomic, are not fully implemented.
Also faults and the dcache ptw interlock are not implemented.
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2021-07-09 15:16:38 -05:00 |
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Ross Thompson
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2efb7a4f81
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Renamed signal in LSU toLSU and fromLSU to toDCache and fromDCache.
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2021-07-08 18:03:52 -05:00 |
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David Harris
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39fa84efdd
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Renamed Funct3ToLSU/fromLSU -> SizeToLSU/FromLSU and simplified size muxing in lsuArb
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2021-07-04 18:56:30 -04:00 |
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David Harris
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57e1111df3
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Gave names to for loops in generate blocks for ease of reference
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2021-07-04 18:52:16 -04:00 |
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Ross Thompson
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8ae0a5bd7d
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relocated lsuarb and pagetable walker inside the lsu. Does not pass busybear or buildroot, but passes rv32ic and rv64ic.
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2021-07-04 13:49:38 -05:00 |
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Ross Thompson
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3dae02818c
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OMG. It's working!
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2021-07-01 17:37:53 -05:00 |
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Ross Thompson
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9d9415ea67
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Got some stores working in virtual memory.
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2021-07-01 12:49:09 -05:00 |
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Ross Thompson
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07a0b66fdf
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Major rewrite of ptw to remove combo loop.
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2021-06-30 16:25:03 -05:00 |
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Ross Thompson
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b31e0afc2a
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The icache now correctly interlocks with the PTW on TLB miss.
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2021-06-30 11:24:26 -05:00 |
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Ross Thompson
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2598f08782
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Page table walker now walks the table.
Added interlock so the icache stalls.
Page table walker not walking correctly, goes to fault state.
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2021-06-29 22:33:57 -05:00 |
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Ross Thompson
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ae6140bd94
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Don't use this branch walker still broken.
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2021-06-28 17:26:11 -05:00 |
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Ross Thompson
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a4266c0136
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Some progress. Had to change how the page table walker got it's ready.
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2021-06-25 15:07:41 -05:00 |
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Kip Macsai-Goren
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1485d29dde
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Light cleanup of signals, style. Changed several signals to account for new Phys Addr sizes as opposed to HADDR.
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2021-06-24 20:01:11 -04:00 |
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Ross Thompson
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0377d3b2c9
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Progress.
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2021-06-24 13:05:22 -05:00 |
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Kip Macsai-Goren
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547bf1d0af
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added a few very simple arbitrations in the lsuArb that pass regression. cleaned up a few unused signals. Added several comments and concerns to lsuarb so I can remember where my thoughts were at the end of the day.
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2021-06-23 19:59:06 -04:00 |
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Ross Thompson
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abe5bc90bf
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Partial addition of page table walker arbiter.
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2021-06-23 17:03:54 -05:00 |
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