13 Commits

Author	SHA1	Message	Date
David Harris	865d5ce0b1	Renamed dtim->ram and boottim ->bootrom	2021-12-14 13:43:06 -08:00
Ross Thompson	9ddd065340	Updated coremark testbench with the extra ports from FPGA merge. ... Fixed coremark Makefile to create work directory.	2021-12-08 13:40:32 -06:00
David Harris	42780ba40b	Added coremark scripts to regression directory	2021-12-01 09:08:06 -08:00
Elizabeth Hedenberg	b818ce608a	commit ehedenberg coremark	2021-05-17 18:02:35 -04:00
ushakya22	6b9ae41302	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2021-03-30 15:25:07 -04:00
Teo Ene	6ebb79abe0	Linux CoreMark is operational	2021-03-04 05:58:18 -06:00
Teo Ene	08a7f6ec25	In the process of updating coremark.RV64I program to work with Dr. Harris's perl script. Commiting to make it easier to switch branches	2021-03-04 01:27:05 -06:00
Teo Ene	6031269de8	Implemented fix disucssed with Elizabeth	2021-03-03 18:17:53 -06:00
Teo Ene	37bf3d836f	Updated coremark .do file for easier debugging	2021-03-03 15:10:39 -06:00
Teo Ene	e7f7f980b3	Updated coremark .do file for easier debugging	2021-03-02 17:23:39 -06:00
Teo Ene	c47872c2af	Changed .do file back to run all	2021-02-25 09:58:54 -06:00
Teo Ene	3e5de35fc4	Added provisional coremark files from work with Elizabeth	2021-02-24 20:07:07 -06:00
Teo Ene	8a6de4fb86	Adding coremark testbench and do files that Elizabeth has written thus far, on this account, in order to avoid merge conflicts	2021-02-10 20:48:39 -06:00