David Harris
e0eb91f795
Changed always @(posedge clk) to always_ff @(posedge clk) where it was omitted in several places
2024-03-06 11:02:04 -08:00
David Harris
b386331cc8
Changed '0 to 0 where possible per Chapter 4 style guidelines
2024-03-06 05:48:17 -08:00
David Harris
45e2317636
Added Wally github address to header comments
2024-01-29 05:38:11 -08:00
naichewa
7dd3f24d6c
Merge branch 'main' into spi
2023-10-30 17:01:41 -07:00
David Harris
48d42c1e7c
Removed unnecessary RV64 PWDATA muxing from AHB peripherals because LSU already replicates
2023-10-18 05:50:41 -07:00
naichewa
d5d4f9d044
transferred spi changes in ECA-authorized commit
2023-10-12 13:36:57 -07:00
David Harris
28823aca6e
Cleaned up lint for plic_apb part select
2023-07-30 02:00:38 -07:00
David Harris
654cafb7f7
Fixed Questa warnings in plic_apb about part select out of bounds
2023-07-30 01:54:41 -07:00
Ross Thompson
a89a1e675c
Merge branch 'boot' into mergeBoot
...
Merges Jacob's new sdc controller into wally.
2023-07-21 17:43:45 -05:00
Jacob Pease
b3aaa87cba
Modified bootloader to access GUID partitions. SDC interrupt to PLIC.
...
Since writing an SD card image generation script, the bootloader
needed to be altered to access individual binaries from specific
partitions. A new file, gpt.c with it's header gpt.h, have been added
to the bootloader to facilitate this.
The SDC has been added to the device tree for the VCU108
board. Additionally the SDC interrupt signal was added to the PLIC
node in the device tree. The PLIC itself was modified to accept the
SDC interrupt signal.
2023-07-14 13:36:44 -05:00
Ross Thompson
cdf73d3b51
Updated comments.
2023-07-06 15:24:26 -05:00
Ross Thompson
e4555dc4af
Removed unused parameter.
2023-07-06 14:57:07 -05:00
Ross Thompson
a963e50e88
It's a bit hacky, but the plic now passes the regression test and should be compatible with the fpga.
2023-07-06 14:07:37 -05:00
Ross Thompson
df56ff73c0
This is at least functionally correct, but has verilator lint issues.
2023-07-06 11:53:34 -05:00
Ross Thompson
c000366d3e
closer, but the wally32/64priv tests are failing.
2023-07-05 17:47:38 -05:00
Ross Thompson
98147e116a
Partially solved fpga boot.
2023-07-05 17:30:55 -05:00
Harshini Srinath
57f4c8a3e4
Update plic_apb.sv
...
Program clean up
2023-06-15 10:08:16 -07:00
Ross Thompson
3cc85349b5
Uncore is now parameterized.
2023-05-26 16:24:12 -05:00
Ross Thompson
ca4b058373
Modified plic and uart to remove async reset. This removes vivado critical warning.
2023-03-24 20:37:48 -05:00
Ross Thompson
46b1bca4fc
Fixed all tap/space issue in RTL.
2023-03-24 17:32:25 -05:00
David Harris
78eb90715c
Removed pipelined level of hierarchy
2023-02-02 14:14:11 -08:00
