Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity
6,282 Commits 5 Branches 2 Tags 53 MiB
2d9de7b58f
Commit Graph

6282 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Marcus Mellor
d4cb1a8582 Add comments to fpu.S indicating which lines of src/fpu/fctrl.sv are covered 2023-03-30 20:01:11 -05:00
Marcus Mellor
3afd963a9e Disable coverage for branches tested in fpu.s 2023-03-30 19:44:55 -05:00
David Harris
da53f240d3 Refactored InstrValidNotFlushed into CSR Write signals 2023-03-30 17:06:09 -07:00
David Harris
406bb22b6a Started factoring out InstrValidNotFlushed from CSRs 2023-03-30 14:56:19 -07:00
David Harris
f34218666a fctrl updated and buildroot working again 2023-03-30 13:17:15 -07:00
David Harris
9129c3ac22 fctrl continued cleanup 2023-03-30 13:07:39 -07:00
David Harris
01c5d58a64 fctrl continued cleanup 2023-03-30 13:05:56 -07:00
David Harris
b2a102ce79 Started to clean up fctrl 2023-03-30 12:57:14 -07:00
Alec Vercruysse
4b58bb55f2 Make entire cache write path conditional on READ_ONLY_CACHE 2023-03-30 10:32:40 -07:00
David Harris
2924179424 Merge pull request #176 from kipmacsaigoren/priv-tests 
Fixed regression after cause CSR fix
 2023-03-30 07:02:47 -07:00
Alessandro Maiuolo
9b290669d5 integrated tv generation for IFdivsqrt 2023-03-29 20:57:26 -07:00
Kip Macsai-Goren
3805cf993a unnecessary comments cleanup 2023-03-29 19:32:57 -07:00
Kip Macsai-Goren
cfb236dd13 Merge branch 'priv-tests' of github.com:kipmacsaigoren/cvw into priv-tests 2023-03-29 16:31:35 -07:00
Kip Macsai-Goren
a7c9d3d37b ported medelg fixes to 32 bit tests. Requires a make allclean 2023-03-29 16:31:28 -07:00
kipmacsaigoren
5cc1bc97da Merge branch 'openhwgroup:main' into priv-tests 2023-03-29 15:34:47 -07:00
David Harris
6934a32747 Merge pull request #175 from SydRiley/main 
Starting IFU coverage expansion
 2023-03-29 15:29:16 -07:00
Sydney Riley
4bd3121364 Manual merge in the coverage64gc 2023-03-29 15:25:27 -07:00
Kip Macsai-Goren
2e151b6b08 updated tests to reflect non-writeable bits of deleg 2023-03-29 15:24:00 -07:00
Sydney Riley
20fec0177d Corrected authorship for IFU.S tests file 2023-03-29 15:20:46 -07:00
Sydney Riley
b0237eaa8b Starting IFU tests including c.fld compressed instruction 2023-03-29 15:15:47 -07:00
Kip Macsai-Goren
491ef14b71 Resolved ImperasDV receiving incorrect cause values 2023-03-29 15:04:56 -07:00
Noah Limpert
6acf1dadda instantiate 5 4KiB arrays, aim to thrash all 4 ways 2023-03-29 13:08:33 -07:00
Noah Limpert
1e07460d0e access of 4KiB spaced mem locations, aim to fill + evict a line of all 4 ways 2023-03-29 13:07:34 -07:00
Alec Vercruysse
d507f85190 icache coverage improvements by simplifying logic 2023-03-29 13:04:00 -07:00
Ross Thompson
5c4b753a1e Merge pull request #173 from davidharrishmc/dev 
Test improvements including FPU coverage
 2023-03-29 13:00:25 -05:00
David Harris
9d8f9e4428 Reduced number of bits in mcause and medeleg registers 2023-03-29 07:02:09 -07:00
David Harris
59f825a54b Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-29 06:19:10 -07:00
David Harris
d604a4fd33 Merge pull request #171 from AlecVercruysse/fix_152 
add check for legal funct3 for IW instructions
 2023-03-29 06:18:31 -07:00
David Harris
d059da6eca Turned on FS bit in fpu.S coverage test 2023-03-29 06:10:05 -07:00
Limnanthes Serafini
91fe85486c Log file cleanup 2023-03-29 04:12:10 -07:00
Limnanthes Serafini
0ab06f08c4 Log file cleanup 2023-03-29 04:11:54 -07:00
Limnanthes Serafini
a4d4f0b914 Log file cleanup 2023-03-29 04:11:43 -07:00
Limnanthes Serafini
abf9da3c8b Git issues, repushing 2023-03-29 04:10:47 -07:00
Limnanthes Serafini
7f2ce66a85 A first pass at the Cache simulator. 2023-03-29 04:03:55 -07:00
Diego Herrera Vicioso
36d7ddf501 Added test coverage cases for writing to STVAL, SCAUSE, SEPC, and STIMECMP CSRs. 2023-03-28 22:48:17 -07:00
David Harris
115c042015 Turned off hpm counters 2023-03-28 21:28:56 -07:00
David Harris
f2c24b869d Simplified fctrl 2023-03-28 21:13:48 -07:00
David Harris
3dc1c6673d Started adding fpu fctrl tests 2023-03-28 21:13:25 -07:00
Alec Vercruysse
46df428e56 add check for legal funct3 for IW instructions 2023-03-28 15:59:48 -07:00
David Harris
92a7e86942 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-28 14:33:18 -07:00
David Harris
16742cbcb6 Merge pull request #170 from ross144/main 
Fixed issue 148 and problems with i/d cache address loggers.
 2023-03-28 14:32:54 -07:00
Ross Thompson
d0f8db7939 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-28 16:31:50 -05:00
Ross Thompson
84860a062d Modified the testbench to not use the loggers for unsupported configurations. 2023-03-28 16:27:54 -05:00
David Harris
6849eeae0c Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-28 14:27:08 -07:00
Ross Thompson
d33f4cfdef Merge branch 'main' of github.com:ross144/cvw 2023-03-28 16:22:26 -05:00
Ross Thompson
c65c9e52d4 Disable loggers by default. 2023-03-28 16:20:45 -05:00
Ross Thompson
650a1a8d7e Now reports if there is a hit or miss. 2023-03-28 16:20:14 -05:00
Ross Thompson
ef26600689 Restored performance counter reports. 2023-03-28 16:15:05 -05:00
Ross Thompson
a5601ea264 Now have logging of i/d cache addresses, but the performance counter reports are x's. 2023-03-28 16:09:54 -05:00
Ross Thompson
65d83b6f63 Merge branch 'main' of github.com:ross144/cvw 2023-03-28 14:47:16 -05:00