Kip Macsai-Goren
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82611ba889
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Manual attempt to merge with upstream changes
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2023-02-22 19:42:30 -08:00 |
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Kip Macsai-Goren
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66833f15f2
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Merge remote-tracking branch 'upstream/main' into main
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2023-02-21 14:48:41 -08:00 |
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David Harris
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081a817925
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Merge pull request #98 from ross144/main
New gshare implementation
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2023-02-20 11:27:47 -08:00 |
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David Harris
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df9950483e
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Removed unused and incomplete ROM macro instantations
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2023-02-20 05:59:57 -08:00 |
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Ross Thompson
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0d79c0cebe
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-02-19 22:54:27 -06:00 |
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Kip Macsai-Goren
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8d0a600b96
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Merge remote-tracking branch 'upstream/main' into main
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2023-02-19 16:37:18 -08:00 |
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David Harris
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6d405ad69b
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Fixed RAM instantiations
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2023-02-19 06:31:41 -08:00 |
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Kip Macsai-Goren
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883a6ca005
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merge upstream synth changes
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2023-02-18 14:35:19 -08:00 |
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David Harris
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a194740562
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Fixed RAM bugs and refactored with read taking place after clock edge rather than before.
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2023-02-17 19:14:38 -08:00 |
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David Harris
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9275bfb839
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Memory synthesis updates
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2023-02-17 15:33:49 -08:00 |
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David Harris
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2060683770
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Continue fixing memory macros for synthesis
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2023-02-17 15:15:37 -08:00 |
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David Harris
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3523318acb
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Synthesis with memories
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2023-02-17 13:51:05 -08:00 |
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Ross Thompson
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27f6552315
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keep this commit off of cvw.
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2023-02-16 11:05:24 -06:00 |
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James Stine
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744991bd5a
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Update if-then-else for ram items
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2023-02-15 18:12:12 -06:00 |
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David Harris
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aae035226f
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Merged with memories
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2023-02-02 14:50:46 -08:00 |
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David Harris
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99d179dd3e
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Removed pipelined level of hierarchy
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2023-02-02 14:14:11 -08:00 |
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