David Harris
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19e30ee89f
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Removed unused addins, cleaned up configuration to support half precision on RV64gc, gate unused hazard inputs to reduce critical path in rv32e
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2023-11-14 11:01:58 -08:00 |
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David Harris
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2d1cf1bbd7
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-11-13 11:25:46 -08:00 |
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David Harris
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ddb8e75f9f
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Merge pull request #470 from stineje/main
Remove ppa_ prefix and modify ppaAnalyze.py to handle correct vector
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2023-11-13 11:25:38 -08:00 |
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James E. Stine
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cb0add51f4
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Remove ppa_ prefix and modify ppaAnalyze.py to handle correct vector
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2023-11-13 10:02:10 -06:00 |
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David Harris
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2180df4477
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Removed assign statement inside always block
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2023-11-13 07:23:15 -08:00 |
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David Harris
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0647142ffa
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-11-13 05:34:14 -08:00 |
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David Harris
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a570199ad5
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Merge pull request #469 from stineje/main
update ppaAnalyze to analyze correctionly freqSweep
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2023-11-13 05:33:37 -08:00 |
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James E. Stine
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964b5f9c50
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update ppaAnalyze to analyze correctionly freqSweep
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2023-11-13 02:39:25 -06:00 |
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David Harris
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5e14f7c422
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-11-12 20:24:25 -08:00 |
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David Harris
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ee4f752d3c
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DivStickyM no longer mysteriously needs to be gated with SqrtM after divder improvemenst
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2023-11-12 20:23:27 -08:00 |
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David Harris
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24942f9054
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DivStickyM no longer mysteriously needs to be gated with SqrtM after divder improvemenst
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2023-11-12 20:23:14 -08:00 |
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Rose Thompson
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40e69b82da
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Merge pull request #468 from davidharrishmc/dev
Divider optimization
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2023-11-12 20:05:44 -08:00 |
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David Harris
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75216f8b2a
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Divider cleanup
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2023-11-12 19:41:12 -08:00 |
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David Harris
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b49330c556
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Explained sqrt preshifting
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2023-11-12 10:05:54 -08:00 |
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David Harris
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fdda3d6cde
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Renamed qsel to uslc and simplified radix2 uslc
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2023-11-12 06:36:57 -08:00 |
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David Harris
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65c5ec6e9d
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fdivsqrt comment improvements
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2023-11-12 06:15:47 -08:00 |
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Rose Thompson
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b0dcfddfb1
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Merge pull request #467 from davidharrishmc/main
Sanity in FDIVSQRT bit counts
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2023-11-11 16:37:25 -08:00 |
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David Harris
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ac1051f67b
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Cleaned up number of bits in fdivsqrt
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2023-11-11 15:50:06 -08:00 |
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David Harris
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051286e703
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Bug fixes related to size of fpdivsqrt bit count and number of cycles
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2023-11-11 05:58:53 -08:00 |
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David Harris
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a3ca197a70
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Fixed testbench-fp to reflect signal name changes
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2023-11-11 04:05:34 -08:00 |
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Rose Thompson
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ec9fbee7db
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Merge pull request #466 from stineje/main
Add pap runs for sweep
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2023-11-10 22:25:55 -08:00 |
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Rose Thompson
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bbfc8ad4a3
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Merge pull request #465 from davidharrishmc/dev
fdivsqrt cleanup
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2023-11-10 22:25:09 -08:00 |
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James E. Stine
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4a6b2b0299
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Update scripts/synth.tcl to add with parameter for width and also checks wrapper to see if running CONFIG=rv32e to run without WIDTH
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2023-11-10 21:10:35 -06:00 |
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James E. Stine
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1af093b368
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Update ppa/ppaSynth.py for sky130 and better sweep parameterization
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2023-11-10 21:07:36 -06:00 |
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James E. Stine
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48c1e19247
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Add bestSynths.csv that are the initial values. If this is re-run after ppaAnalysis.py is run, more refinement can be made
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2023-11-10 21:06:24 -06:00 |
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James E. Stine
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26db31cfde
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update README for ppaSynth.py
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2023-11-10 21:05:42 -06:00 |
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David Harris
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35efb7082c
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fdivsqrt parameter cleanup
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2023-11-10 18:33:08 -08:00 |
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David Harris
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6ed5ba4a85
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Simplified out LOGRK parameter
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2023-11-10 18:19:41 -08:00 |
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David Harris
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1302a89baf
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divider cleanup
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2023-11-10 18:01:13 -08:00 |
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David Harris
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d92f3e0216
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fdivsqrt cleanup
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2023-11-10 16:42:32 -08:00 |
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David Harris
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fbd6fce1ce
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-11-10 16:40:54 -08:00 |
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David Harris
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f539f6171b
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Simplified integer postnormalization shift
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2023-11-10 14:55:36 -08:00 |
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David Harris
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72ad1d361c
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Simplified IntDivNormShift
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2023-11-10 14:28:57 -08:00 |
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David Harris
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b8bdb1c7d1
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Simplified cycle count logic
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2023-11-10 14:00:27 -08:00 |
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David Harris
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083ed09f1e
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Reduced duplicated logic in fdivsqrtcycles
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2023-11-10 11:25:54 -08:00 |
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David Harris
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4d77f28a19
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Divsqrt cleanup: change Q to U, commenting code
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2023-11-10 11:21:02 -08:00 |
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David Harris
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a1f94c9b0c
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fdivsqrt parameter cleanup
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2023-11-10 09:11:15 -08:00 |
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Rose Thompson
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5026772301
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Merge pull request #463 from davidharrishmc/dev
Dev
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2023-11-10 08:48:07 -08:00 |
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David Harris
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fedf9c8a5a
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Started cleaning up shifting leading 1 in fdivsqrt
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2023-11-10 08:46:55 -08:00 |
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David Harris
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68115c6d6b
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Imperas commenting
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2023-11-10 08:26:32 -08:00 |
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David Harris
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ae769e90aa
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Add Svadu support and SPI to imperas configuration
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2023-11-10 06:27:25 -08:00 |
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David Harris
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5dbe869339
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Merge pull request #460 from naichewa/main
removed vestigial logic, added comments, deleted unused signals
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2023-11-10 05:18:57 -08:00 |
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naichewa
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fd06472de8
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Cleanup
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2023-11-09 16:52:55 -08:00 |
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naichewa
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2b4cf01a21
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Remove old 2/4 bit logic, add comments,
clean up unused signals
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2023-11-09 16:48:11 -08:00 |
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David Harris
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1876d5bebf
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-11-09 10:33:25 -08:00 |
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Rose Thompson
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89a303fbef
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Merge pull request #458 from stineje/main
fix to setup.csh and also ppaSynth.py
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2023-11-09 10:20:05 -08:00 |
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David Harris
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d1e73ee9c2
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Reporting stall path in synthesis script, support Zcb in Imperas
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2023-11-09 06:59:29 -08:00 |
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James E. Stine
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29d6fe8fea
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update README on ppa
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2023-11-09 01:00:33 -06:00 |
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James E. Stine
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20e1e12234
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update ppaSynth.py with runCommand
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2023-11-09 00:52:40 -06:00 |
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James E. Stine
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5361766045
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Add encoding for utf-8 on wrapperGen.py to avoid issue with incorrect encoding on RHEL C-shell
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2023-11-08 23:57:59 -06:00 |
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