Rose Thompson
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7aca4f0f97
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Merge pull request #479 from davidharrishmc/main
Removed and added back in riscv-arch-test to try to fix corruption
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2023-11-15 08:46:42 -08:00 |
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Rose Thompson
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4551bf9e6f
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Merge pull request #478 from davidharrishmc/dev
Removed non-functioning Zfh from rv64gc
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2023-11-15 08:46:24 -08:00 |
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David Harris
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5b4b04d763
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Fixed typo in lsu parameter
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2023-11-15 08:30:48 -08:00 |
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David Harris
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11b30292b9
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Adjusted LSU misaligned buffer to fix synthesis warning
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2023-11-15 08:19:50 -08:00 |
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David Harris
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c63cc95663
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Added cmoz support to imperas.ic and adjusted imperas testbench to no longer need FPGA parameter
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2023-11-15 08:15:01 -08:00 |
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David Harris
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2e3a1832f5
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-11-15 08:06:35 -08:00 |
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David Harris
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981df2fbd8
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Fixed messed-up hazard.sv
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2023-11-15 08:05:41 -08:00 |
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James E. Stine
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43ff20d2f2
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missing synth.tcl added for use with wrapper
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2023-11-15 08:48:07 -06:00 |
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James E. Stine
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b654e47d70
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Add wrapper passing automatically for individual designs vs. Wally
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2023-11-15 08:45:25 -06:00 |
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David Harris
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e9f8203c58
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Added back in riscv-arch-test
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2023-11-15 06:07:57 -08:00 |
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David Harris
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68e108a2df
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Removed riscv-arch-test submodule that was corrupted
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2023-11-15 06:05:55 -08:00 |
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David Harris
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07b4f40b74
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Added back riscv-arch-test fresh
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2023-11-15 05:48:33 -08:00 |
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David Harris
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62b01b70db
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Removed riscv-arch-test submodule that appears corrupted
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2023-11-15 05:46:38 -08:00 |
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David Harris
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28cba247bf
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-11-14 19:14:03 -08:00 |
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David Harris
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8ca721f95e
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Merge pull request #476 from naichewa/main
Final SPI code review
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2023-11-14 19:10:00 -08:00 |
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David Harris
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5b8806ffe5
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-11-14 15:19:22 -08:00 |
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David Harris
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db16833ee8
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Restored Zfh to 0 for rv64gc because it breaks floating-point tests
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2023-11-14 15:18:16 -08:00 |
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naichewa
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3dfaf08363
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Merge branch 'spi' into main
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2023-11-14 14:51:06 -08:00 |
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naichewa
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7ecf35bc68
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Final Code Review
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2023-11-14 13:44:59 -08:00 |
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Rose Thompson
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c285177507
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Patched up linux imperas testbench.
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2023-11-14 14:20:13 -06:00 |
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Rose Thompson
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730d8e8e97
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Merge pull request #474 from davidharrishmc/dev
FP and synthesis cleanup
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2023-11-14 12:03:01 -08:00 |
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Rose Thompson
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94d4de5498
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Merge branch 'main' of github.com:ross144/cvw
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2023-11-14 13:54:48 -06:00 |
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Rose Thompson
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9d55f5092b
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Modified the device trees to include all the minor extensions.
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2023-11-14 13:54:16 -06:00 |
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David Harris
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19e30ee89f
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Removed unused addins, cleaned up configuration to support half precision on RV64gc, gate unused hazard inputs to reduce critical path in rv32e
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2023-11-14 11:01:58 -08:00 |
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Rose Thompson
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0120bb8376
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Fixed the imperas testbench to be compatible with the config changes.
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2023-11-14 12:57:44 -06:00 |
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David Harris
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efd9e35da8
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Merge pull request #473 from ross144/main
Missed a few files in the last pull request. Removes the fpga config from the linter.
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2023-11-14 10:15:31 -08:00 |
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Rose Thompson
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33b123aa25
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Added cbop to to rv32gc.
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2023-11-14 10:55:22 -06:00 |
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David Harris
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1fe4b18057
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Merge pull request #472 from ross144/main
Merge Zicclsm into main branch and removes the FPGA config. FPGA makefile now automatically creates the config when building
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2023-11-14 08:34:06 -08:00 |
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David Harris
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78be798336
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Merge pull request #471 from stineje/main
Fix multitude of issues with plotPPA as well as issue related to Popen issuing too many synthesis
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2023-11-14 05:51:20 -08:00 |
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James E. Stine
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22b9fee1c7
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minor typo on ppaSynth and ppaAnalyze
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2023-11-14 02:41:44 -06:00 |
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James E. Stine
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d20a798f79
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fix plotPPA and other excruciatingly painful problems related to using allWidths and causing empty arrays to be used. This generates the normalized/unnormalized plots
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2023-11-14 01:06:14 -06:00 |
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James E. Stine
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7c8eff3af7
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Modify ppaSynth.py to be able to not issue excess number of operations with Pool command. This is due to the original command using the Popen command, whereas, using the subprocess.call command solves this issue. The relieves the python script from issuing a ton of synthesis commands and using up all the licenses
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2023-11-14 01:04:37 -06:00 |
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Rose Thompson
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508c0cb188
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Fixed another bug in the updated script changes.
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2023-11-13 18:12:02 -06:00 |
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Rose Thompson
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a5303d25aa
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Merge branch 'main' of github.com:ross144/cvw
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2023-11-13 18:10:35 -06:00 |
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Rose Thompson
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04cda8cb71
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Fixed bugs in the updated fpga synthe script.
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2023-11-13 18:10:22 -06:00 |
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Rose Thompson
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4302c0a3b0
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Removed fpga config. No longer needed.
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2023-11-13 17:50:29 -06:00 |
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Rose Thompson
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7f2d03df7f
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Modified the fpga build script to generate it's own config file rather than use the one in config/fpga.
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2023-11-13 17:48:28 -06:00 |
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Rose Thompson
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b81bd35724
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Towards removing the FPGA config file.
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2023-11-13 17:20:26 -06:00 |
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Rose Thompson
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e7cf9de469
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Reduced Arty A7 clock speed to 20Mhz to support Zicclsm.
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2023-11-13 16:44:02 -06:00 |
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Rose Thompson
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ed7829dba8
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Fixed bug in uncore updates which broke SDC.
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2023-11-13 16:15:23 -06:00 |
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Rose Thompson
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3a495f2552
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Cleanup and optimization of Zicclsm.
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2023-11-13 14:28:22 -06:00 |
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Rose Thompson
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a53b9403e2
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Commented out the arch64priv misaligned load/store tests since we added Zicclsm to the rv64gc config.
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2023-11-13 14:12:27 -06:00 |
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Rose Thompson
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17768471f8
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Cleanup.
Linux makefile
wally tracer. probably reduce some complexity here.
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2023-11-13 14:04:43 -06:00 |
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Rose Thompson
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2f7479966b
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Merge branch 'Zicclsm'
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2023-11-13 13:53:42 -06:00 |
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Rose Thompson
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b813fe8061
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Updates to linux config files for sdc.
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2023-11-13 13:53:23 -06:00 |
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David Harris
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2d1cf1bbd7
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-11-13 11:25:46 -08:00 |
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David Harris
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ddb8e75f9f
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Merge pull request #470 from stineje/main
Remove ppa_ prefix and modify ppaAnalyze.py to handle correct vector
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2023-11-13 11:25:38 -08:00 |
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Rose Thompson
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7ff89380e0
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Updated buildroot to use kernel 6.6 and added dedicated qemu emulation script.
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2023-11-13 12:36:32 -06:00 |
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Rose Thompson
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8860aa9af5
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Cleanup.
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2023-11-13 12:35:11 -06:00 |
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James E. Stine
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cb0add51f4
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Remove ppa_ prefix and modify ppaAnalyze.py to handle correct vector
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2023-11-13 10:02:10 -06:00 |
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