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Author SHA1 Message Date
David Harris
09c8886f0d Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-06-06 08:46:54 -07:00
David Harris
753ec9a11c Modified benchmarks/coremark/Makefile to clean addins/coremark as well 2023-06-06 08:46:44 -07:00
David Harris
62a8332c8f
Merge pull request #313 from ross144/main 
Fix extraneous force in testbench which keep btb in reset.
 2023-06-06 08:41:34 -07:00
Kevin Kim
024bef4f2d
Merge branch 'openhwgroup:main' into divsqrtrem 2023-06-06 07:02:48 -07:00
David Harris
df212ce7d8
Merge pull request #312 from ross144/main 
Fixed typo in coremark makefile.
 2023-06-06 05:44:22 -07:00
Ross Thompson
822e60bd3d Found the coremark performance issue. The testbench was continuously forcing the BTB to all zeros. Once fixed it resolved the performance problem. 2023-06-05 15:42:05 -05:00
Ross Thompson
21a73e0e43 Fixed typo in coremark makefile. 2023-06-05 11:49:16 -05:00
Ross Thompson
f9ca6732b8
Merge pull request #311 from stineje/main 
Update some bugs in FPU
 2023-06-05 12:19:08 -04:00
James Stine
736ae7d749 Update fcvt tests for l.s/lu.s and s.l/s.lu that were missing 2023-06-05 11:03:59 -05:00
James Stine
51d77b0414 Update some spacing to make it look better 2023-06-05 11:03:06 -05:00
Kevin Kim
341d15316f Merge branch 'main' into divsqrtrem 2023-05-31 17:26:05 -07:00
Kevin Kim
42163f9cfd Merge branch 'main' of https://github.com/kipmacsaigoren/cvw into main 2023-05-31 17:17:21 -07:00
Kevin Kim
6df19e460f added custom fp tests 2023-05-31 17:16:05 -07:00
Ross Thompson
80cdb02d43 Changes required to make verilator compile wally's testbench to c++. Not actually tested in simulation yet. 2023-05-31 16:51:00 -05:00
Ross Thompson
7cd727c918 Oups forgot to include updates to the lint script itself. 2023-05-31 11:00:38 -05:00
Ross Thompson
e56497101a Updated source code to be compatible with verilator 5.011 for lint only. 2023-05-31 10:44:23 -05:00
Ross Thompson
ab91fe7436 Cleanup parameterization for verilator 5.010. 2023-05-31 10:02:34 -05:00
David Harris
94629d0570 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-05-31 06:31:52 -07:00
David Harris
c1e7332abf Fixed paths in creating division test vectors 2023-05-31 06:30:41 -07:00
David Harris
436ba397ce Support all testfloat tests with parameterized design 2023-05-31 06:30:21 -07:00
Ross Thompson
2232767bba
Merge pull request #307 from davidharrishmc/dev 
Assorted cleanup, including test vector generation
 2023-05-30 20:04:58 -04:00
David Harris
8c1bd8523a Clean up combined int/fp vector creation 2023-05-30 14:01:12 -07:00
David Harris
97763beb75 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-05-30 13:53:28 -07:00
David Harris
ca0b89c607
Merge pull request #306 from ross144/main 
fixed testfloat testbench for parameterization
 2023-05-30 13:53:14 -07:00
Ross Thompson
52b41b2050 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-05-30 15:51:19 -05:00
Ross Thompson
0f8049a04f Hacked it together, but I think testfloat is working. 2023-05-30 15:51:13 -05:00
David Harris
0c718f2b71 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-05-30 13:40:56 -07:00
David Harris
1b647dc235
Merge pull request #305 from ross144/main 
Fixed all do scripts for parameterization
 2023-05-30 13:40:44 -07:00
Ross Thompson
bf65527b29 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-05-30 15:38:58 -05:00
Ross Thompson
e859609a6e Updated do files for parameterization. 2023-05-30 15:38:03 -05:00
David Harris
ed9a834bc1
Merge pull request #304 from ross144/main 
Fixes bug 203 and linux/ImperasDV mismatch at 571M instructions
 2023-05-30 13:37:00 -07:00
Ross Thompson
3c94c186db Possible fix for Linux bug and bug 203. ImperasDV mismatches in linux boot around 571M instructions after the login prompt. 
This bug occurs when there are back to back HPTW requests and the first generates an access fault during the walk. The old implementation uses a delayed version of the fault to prevent the HTPW fsm from transitioning out of the IDLE state.  Because the first request generates the fault and the second request is pipelined the second request appears as if it also faults so the FSM does not perform the walk.
The new implementation adds a FAULT state.  When the HPTW generates an access fault it transitions to this state removes the HPTWStall and then transitions to IDLE.  There may still be a remaining bug here if the pipeline is stalled for another reason.  However I don't think it is possible by construction.  The only possible sources of stalls at this point would be IFU and LSU stalls and both are required to make this condition happen.
 2023-05-30 15:20:24 -05:00
David Harris
bbe0f0c093 Exclusions for decoders with new parameterization 2023-05-30 01:04:39 -07:00
David Harris
ebdf676eec Eliminated merging non-existent coverage 2023-05-30 00:38:30 -07:00
David Harris
9b8a2303a9 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-05-29 23:24:54 -07:00
David Harris
4357cc579c ignore example binaries 2023-05-29 23:24:48 -07:00
Kevin Kim
caf6840211 connected drsu in/out in fp-testbench 
testbench gives spurious succesful messages...
check sqrt. result and answer signals are mismatch in waveforms but tb says ok...
 2023-05-28 21:18:37 -07:00
Kevin Kim
bca32af002 added initial tests selection for unified fdiv, fsqrt 2023-05-28 15:19:32 -07:00
Kevin Kim
9307f8b7d5 added divremsqrtunit macro 2023-05-28 15:19:01 -07:00
Kevin Kim
43f6b7cfa3 fixed bug in testvector extract script 
- old script skips first 2 lines in rv32m case, new script only skips first line
 2023-05-28 11:48:41 -07:00
Kevin Kim
9b3a876656 fixed bug in rv32M test vector generation code 
- prior code skipped every other line in the reference file, so it only generated half the test vectors, with half of them having the wrong answer
- prior code also opened test vector file to be written to in "append" mode, and I changed to write mode (so that the script overwrites instead of adding to an existing file)
 2023-05-28 11:40:51 -07:00
David Harris
aa95d1957b
Merge pull request #303 from ross144/main 
Merges Lim's changes for parameterization.  Replaces the `define with parameters
 2023-05-26 16:32:49 -07:00
Ross Thompson
903f2f9063 Merge branch 'param-lim-merge' 2023-05-26 16:25:35 -05:00
Ross Thompson
b8474b208e Uncore is now parameterized. 2023-05-26 16:24:12 -05:00
Ross Thompson
340aac0934 Got the branch predictor parameterized using Lim's method. Also had to add a global enum included in both cvw.sv and the configs which defines the branch predictor types. This should be synthesizable, but I'll need to double check. 2023-05-26 16:00:14 -05:00
Ross Thompson
e6d25b7f70 Finished fpu parameterization using Lim's method. 2023-05-26 14:40:06 -05:00
Ross Thompson
ef2bb7df93 fdiv is now parameterized using Lim's method. 2023-05-26 14:25:14 -05:00
Ross Thompson
c76eb315bc Parameterized fpu's unpack and fma using Lim's method. 2023-05-26 14:12:25 -05:00
Ross Thompson
923c00b928 I think I've solved the slow down issue. Parameters can't be mixed with cvw_t and other types. 2023-05-26 13:56:51 -05:00
Ross Thompson
8aba897386 Update top level parameterized. Simulation slowed down to 4.5 minutes. 2023-05-26 12:13:11 -05:00