Ross Thompson
c6ebe7733b
Hacked the sram memory models to reset their internal registers. This allows the simulation to run but is only temporary.
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About 149307ns of simulation run.
2021-02-18 21:32:15 -06:00
Ross Thompson
de9e383bc6
Wrote a bash script to generate custom modelsim radix which maps instruction addresses into human readable lables.
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Once combined with some simulation verilog this will display the current function in modelsim.
2021-02-17 22:20:28 -06:00
Ross Thompson
5df7e959f3
Integrated the branch predictor into the hardward. Not yet working.
2021-02-17 22:19:17 -06:00
Noah Boorstin
7312da1a99
busybear: allow testbench to ignore lack of MMU for now
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I'd really like to go over this with someone else, not sure if this is
a good thing to be doing
If it is, we're at 1M instructions!
2021-02-12 20:08:56 +00:00
bbracker
9231646fb3
bus rw bugfix and peripherals testing
2021-02-12 00:02:45 -05:00
Teo Ene
8a6de4fb86
Adding coremark testbench and do files that Elizabeth has written thus far, on this account, in order to avoid merge conflicts
2021-02-10 20:48:39 -06:00
David Harris
2357f5513b
Debugging instruction fetch
2021-02-09 11:02:17 -05:00
David Harris
3551cc859b
Data memory bus integration
2021-02-07 23:21:55 -05:00
Noah Boorstin
01c0f9db63
Busybear: next week of updates
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- move parsed instructions out of git, to /courses/e190ax/busybear_boot
- parsed first 1M instructions, and now parse from split GDB runs
- now at about 230k instructions, can't progress further for now since atomic instructions
aren't implemented yet
2021-02-07 03:14:48 +00:00
Noah Boorstin
14cde0d59c
Change CSR reset and available bits to conform to OVPsim
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Now actually keeping perfectly in line with OVP for the first 100k instrs. Yay.
2021-02-04 22:03:45 +00:00
Jarred Allen
ea791cb057
Change busybear test to use work-busybear library
2021-02-03 11:12:47 -05:00
Jarred Allen
10f023b44d
Refactor regression test
2021-02-02 17:22:29 -05:00
Noah Boorstin
b370be4a8a
Add busybear testbench to nightly regression checking
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If you don't like how I did this please feel free to undo it
2021-02-02 22:05:35 +00:00
Jarred Allen
5090537f3c
Fix intermittent errors caused by weird library stuff
2021-02-02 11:20:09 -05:00
Jarred Allen
2b75e38239
Fix issues in parallel regression testing
2021-02-01 23:29:03 -05:00
Noah Boorstin
ff88214730
busybear: change register file checking to only store register changed
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this should make parsedRegs.txt much smaller
2021-02-02 01:27:43 +00:00
Jarred Allen
84801213d6
Parallelize regression-wally.p
2021-02-01 15:40:27 -05:00
Noah Boorstin
b7f63c1dc7
busybear: NOP out floating point instructions for now
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Why does linux even try to do float stuff doing booting??
also, now runs the first 100k instructions!
2021-01-30 19:52:47 +00:00
Noah Boorstin
4358f086be
update busybear testbench to conform to new structure
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aaaaaaaaaaaaaaaaaahhhh so many changes
also the testbench now uses another internal signal,
which I don't like, but I can't think of a better option rn
2021-01-30 19:19:00 +00:00
David Harris
396cea1ea7
Reorganized src hierarchically
2021-01-30 11:50:37 -05:00
David Harris
a357f2a0e7
Connected AHB bus to Uncore
2021-01-29 23:43:48 -05:00
David Harris
8d4f5277d2
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-01-29 15:38:01 -05:00
David Harris
dc2443c55b
Moving data memory to uncore
2021-01-29 15:37:51 -05:00
Noah Boorstin
194d5b55ab
update busybear testbench to conform to new structure
2021-01-29 17:46:50 +00:00
Noah Boorstin
8ab5879af5
busybear testbench: test on first 100k instrs
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currently gets about 47k instrs correctly
also fix gdb parsing to avoid accidently matching on function names
2021-01-29 00:14:23 -05:00
Noah Boorstin
619dec1490
busybear: simulate first 10k instructions
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I know we need to add CSR checking sometime soon
Also I'm a bit sketpical this is all working properly, and that no new bugs
were uncovered from 1k instrs to 10k instrs
2021-01-28 19:44:58 -05:00
Noah Boorstin
4f84bd3c8f
busybear: fix misaligned writing checking
2021-01-28 19:35:09 -05:00
Noah Boorstin
beb93e2508
busybear: add more test instructions
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currently testing first 1k instrs
2021-01-28 16:41:37 -05:00
Noah Boorstin
91e9defd0a
more of the same fixes
2021-01-28 16:26:15 -05:00
Noah Boorstin
623d9feeab
more misaligned read fixing
...
I'm getting fairly concerned about this, I feel like
this should only work if the memory ignores the lower 3 or 4 bits of the adr
2021-01-28 16:14:35 -05:00
Noah Boorstin
405c9d90b5
busybear testbench: understand bytemask for writes
2021-01-28 15:42:47 -05:00
Noah Boorstin
a4bac85ece
busybear: ret is only 1 word
2021-01-28 14:47:40 -05:00
Noah Boorstin
0befdfacec
add speculative exception for compressed instructions
2021-01-28 14:40:35 -05:00
Noah Boorstin
27142f0fef
testbench now understands lw not aligned to 8 bytes
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also busybear now has first 500 instead of 100 instrs
and prints current instrs less
2021-01-28 13:33:22 -05:00
Noah Boorstin
206747b8b2
Busybear test now processes first 100 instrs correctly!
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- changed test parser to recognize lw in addition to lw
also, added temporary questa files (wlft*) to .gitignore
2021-01-28 01:19:27 -05:00
Noah Boorstin
8f6994196a
fix memory write address decoding for busybear tests
2021-01-28 01:19:26 -05:00
Noah Boorstin
28fabb94ee
update busybear testbench to conform to new structure
2021-01-27 23:42:19 -05:00
David Harris
4df461ad77
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-01-27 22:49:55 -05:00
David Harris
824014c5c0
Repartitioned with Instruction Fetch Unit, Integer Execution Unit
2021-01-27 22:49:47 -05:00
Noah Boorstin
c9baa70e26
update busybear testbench to conform to new structure
2021-01-27 12:54:09 -05:00
David Harris
e84fbd0a73
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-01-27 06:40:39 -05:00
David Harris
b88508ca11
Repartitioned datapath and controller into ieu
2021-01-27 06:40:26 -05:00
Noah Boorstin
1195ebb468
show instruction assembly in waveform
2021-01-26 12:34:12 -05:00
Noah Boorstin
6c567aab9a
Update busybear tests to conform to new directory structure
2021-01-25 20:37:18 -05:00
Noah Boorstin
e92db93939
Fixed mem write checking
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now passes around 50 instructions!
2021-01-25 20:07:08 -05:00
Noah Boorstin
358393a1da
fix speculation ignoring for PC fetching
2021-01-25 20:07:06 -05:00
David Harris
fa18052348
Added test configurations
2021-01-25 11:28:43 -05:00
