Ross Thompson
005307fc16
Resolved the duplicated check signature issue.
2023-06-14 11:50:12 -05:00
Ross Thompson
c91530aa17
Updates to wave file.
2023-06-14 10:49:09 -05:00
Ross Thompson
5d0e86f650
Fixed another issue with the timing of memory resets in the new testbench.
2023-06-13 16:24:38 -05:00
Ross Thompson
ed7d785175
Now have most of the regression tests running again.
2023-06-13 15:09:40 -05:00
Ross Thompson
5b0467b287
Cleaned up testbench more.
2023-06-13 14:05:17 -05:00
Ross Thompson
7d53af9206
Compacted memory resets.
2023-06-13 13:57:58 -05:00
Ross Thompson
269d7b2430
More cleanup.
2023-06-13 13:54:07 -05:00
Ross Thompson
40f7031fe7
Fixed the multliple reads of the same preload memory file.
2023-06-13 13:52:02 -05:00
Ross Thompson
261b34af5d
The testbench now at least runs the arch64i in rv64gc config. Still has several issues
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1. need to remove all dead code
2. seems to still be double reading memory files sometimes.
3. batch mode does not work.
2023-06-13 13:18:46 -05:00
Ross Thompson
d9f7daf5e0
The new testbench is almost working except the shadow copy is not working.
2023-06-12 15:08:23 -05:00
Ross Thompson
80a6170fe1
Progress towards new testbench.
2023-06-12 14:06:17 -05:00
Ross Thompson
bbe3f1caf0
Created temporary wrapper for lint.
2023-06-12 11:49:51 -05:00
Ross Thompson
9a1042b0b1
This parameterizes the testbench but does not use the verilator updates or the new testbench.
2023-06-12 11:00:30 -05:00
Ross Thompson
c3102bb82b
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-06-09 09:28:31 -05:00
Ross Thompson
9bae203d1c
Updated parameterization types. Modelsim version 2022.1 did requires defaults to a 32 bit integer. The base and ranges for the address decoder need to be larger.
2023-06-09 09:28:24 -05:00
David Harris
1c547fc02e
Merge pull request #316 from ross144/main
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Fixed garbled output in embench
2023-06-08 09:09:13 -07:00
Ross Thompson
74ccabdf69
Fixed the garbled output in embench transcript.
2023-06-08 10:43:46 -05:00
Ross Thompson
441ffc6d41
Merge pull request #315 from davidharrishmc/dev
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CoreMark runs without error after post processing script is removed
2023-06-06 23:30:58 -04:00
David Harris
cea6f89ac8
Removed postprocessing script from Coremark because percentages are already computed
2023-06-06 20:12:13 -07:00
Ross Thompson
f4883e31df
Merge pull request #314 from davidharrishmc/dev
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Make and FP script improvements
2023-06-06 12:38:26 -04:00
David Harris
09c8886f0d
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2023-06-06 08:46:54 -07:00
David Harris
753ec9a11c
Modified benchmarks/coremark/Makefile to clean addins/coremark as well
2023-06-06 08:46:44 -07:00
David Harris
62a8332c8f
Merge pull request #313 from ross144/main
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Fix extraneous force in testbench which keep btb in reset.
2023-06-06 08:41:34 -07:00
David Harris
df212ce7d8
Merge pull request #312 from ross144/main
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Fixed typo in coremark makefile.
2023-06-06 05:44:22 -07:00
Ross Thompson
822e60bd3d
Found the coremark performance issue. The testbench was continuously forcing the BTB to all zeros. Once fixed it resolved the performance problem.
2023-06-05 15:42:05 -05:00
Ross Thompson
21a73e0e43
Fixed typo in coremark makefile.
2023-06-05 11:49:16 -05:00
Ross Thompson
f9ca6732b8
Merge pull request #311 from stineje/main
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Update some bugs in FPU
2023-06-05 12:19:08 -04:00
James Stine
736ae7d749
Update fcvt tests for l.s/lu.s and s.l/s.lu that were missing
2023-06-05 11:03:59 -05:00
James Stine
51d77b0414
Update some spacing to make it look better
2023-06-05 11:03:06 -05:00
Ross Thompson
7cd727c918
Oups forgot to include updates to the lint script itself.
2023-05-31 11:00:38 -05:00
Ross Thompson
e56497101a
Updated source code to be compatible with verilator 5.011 for lint only.
2023-05-31 10:44:23 -05:00
Ross Thompson
ab91fe7436
Cleanup parameterization for verilator 5.010.
2023-05-31 10:02:34 -05:00
David Harris
94629d0570
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2023-05-31 06:31:52 -07:00
David Harris
c1e7332abf
Fixed paths in creating division test vectors
2023-05-31 06:30:41 -07:00
David Harris
436ba397ce
Support all testfloat tests with parameterized design
2023-05-31 06:30:21 -07:00
Ross Thompson
2232767bba
Merge pull request #307 from davidharrishmc/dev
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Assorted cleanup, including test vector generation
2023-05-30 20:04:58 -04:00
David Harris
8c1bd8523a
Clean up combined int/fp vector creation
2023-05-30 14:01:12 -07:00
David Harris
97763beb75
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2023-05-30 13:53:28 -07:00
David Harris
ca0b89c607
Merge pull request #306 from ross144/main
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fixed testfloat testbench for parameterization
2023-05-30 13:53:14 -07:00
Ross Thompson
52b41b2050
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-05-30 15:51:19 -05:00
Ross Thompson
0f8049a04f
Hacked it together, but I think testfloat is working.
2023-05-30 15:51:13 -05:00
David Harris
0c718f2b71
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2023-05-30 13:40:56 -07:00
David Harris
1b647dc235
Merge pull request #305 from ross144/main
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Fixed all do scripts for parameterization
2023-05-30 13:40:44 -07:00
Ross Thompson
bf65527b29
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-05-30 15:38:58 -05:00
Ross Thompson
e859609a6e
Updated do files for parameterization.
2023-05-30 15:38:03 -05:00
David Harris
ed9a834bc1
Merge pull request #304 from ross144/main
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Fixes bug 203 and linux/ImperasDV mismatch at 571M instructions
2023-05-30 13:37:00 -07:00
Ross Thompson
3c94c186db
Possible fix for Linux bug and bug 203. ImperasDV mismatches in linux boot around 571M instructions after the login prompt.
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This bug occurs when there are back to back HPTW requests and the first generates an access fault during the walk. The old implementation uses a delayed version of the fault to prevent the HTPW fsm from transitioning out of the IDLE state. Because the first request generates the fault and the second request is pipelined the second request appears as if it also faults so the FSM does not perform the walk.
The new implementation adds a FAULT state. When the HPTW generates an access fault it transitions to this state removes the HPTWStall and then transitions to IDLE. There may still be a remaining bug here if the pipeline is stalled for another reason. However I don't think it is possible by construction. The only possible sources of stalls at this point would be IFU and LSU stalls and both are required to make this condition happen.
2023-05-30 15:20:24 -05:00
David Harris
bbe0f0c093
Exclusions for decoders with new parameterization
2023-05-30 01:04:39 -07:00
David Harris
ebdf676eec
Eliminated merging non-existent coverage
2023-05-30 00:38:30 -07:00
David Harris
9b8a2303a9
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2023-05-29 23:24:54 -07:00
