David Harris
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5c4e2ea2fb
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Merge pull request #1238 from jordancarlin/zc_tests
Update riscv-arch-test and enable remaining Zcf and Zcd tests
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2025-01-21 20:14:13 -08:00 |
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dependabot[bot]
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15cc6a77b0
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Bump addins/cvw-arch-verif from cdc4005 to 66b6750
Bumps [addins/cvw-arch-verif](https://github.com/openhwgroup/cvw-arch-verif) from `cdc4005` to `66b6750`.
- [Commits](cdc4005363...66b6750178 )
---
updated-dependencies:
- dependency-name: addins/cvw-arch-verif
dependency-type: direct:production
...
Signed-off-by: dependabot[bot] <support@github.com>
|
2025-01-20 13:35:30 +00:00 |
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Jordan Carlin
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e0c4eee86c
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Update riscv-arch-test and enable remaining Zcf and Zcd tests
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2025-01-17 10:32:28 -08:00 |
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Jordan Carlin
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96af5d1618
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Merge pull request #1225 from openhwgroup/dependabot/submodules/addins/vivado-boards-d1898bd
Bump addins/vivado-boards from `8ed4f99` to `d1898bd`
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2025-01-07 10:17:42 -08:00 |
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dependabot[bot]
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395e3773da
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Bump addins/cvw-arch-verif from acf99b1 to cdc4005
Bumps [addins/cvw-arch-verif](https://github.com/openhwgroup/cvw-arch-verif) from `acf99b1` to `cdc4005`.
- [Commits](acf99b1df4...cdc4005363 )
---
updated-dependencies:
- dependency-name: addins/cvw-arch-verif
dependency-type: direct:production
...
Signed-off-by: dependabot[bot] <support@github.com>
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2025-01-06 14:07:14 +00:00 |
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dependabot[bot]
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6d003ea1f2
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Bump addins/vivado-boards from 8ed4f99 to d1898bd
Bumps [addins/vivado-boards](https://github.com/Digilent/vivado-boards) from `8ed4f99` to `d1898bd`.
- [Commits](8ed4f9981d...d1898bd01f )
---
updated-dependencies:
- dependency-name: addins/vivado-boards
dependency-type: direct:production
...
Signed-off-by: dependabot[bot] <support@github.com>
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2025-01-06 14:07:12 +00:00 |
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Jordan Carlin
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8d2b1ff057
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Update riscv-arch-test again
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2024-12-31 02:23:05 -08:00 |
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Jordan Carlin
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a766c2bb67
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Update riscv-arch-test
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2024-12-31 01:02:47 -08:00 |
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dependabot[bot]
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5f68d6d585
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Bump addins/cvw-arch-verif from f04bcd7 to acf99b1
Bumps [addins/cvw-arch-verif](https://github.com/openhwgroup/cvw-arch-verif) from `f04bcd7` to `acf99b1`.
- [Commits](f04bcd729f...acf99b1df4 )
---
updated-dependencies:
- dependency-name: addins/cvw-arch-verif
dependency-type: direct:production
...
Signed-off-by: dependabot[bot] <support@github.com>
|
2024-12-30 13:26:46 +00:00 |
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dependabot[bot]
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fb642c7f35
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Bump addins/cvw-arch-verif from efd70ce to f04bcd7
Bumps [addins/cvw-arch-verif](https://github.com/openhwgroup/cvw-arch-verif) from `efd70ce` to `f04bcd7`.
- [Commits](efd70ce71a...f04bcd729f )
---
updated-dependencies:
- dependency-name: addins/cvw-arch-verif
dependency-type: direct:production
...
Signed-off-by: dependabot[bot] <support@github.com>
|
2024-12-23 13:50:07 +00:00 |
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dependabot[bot]
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1025548a3a
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Bump addins/cvw-arch-verif from 95f849e to efd70ce
Bumps [addins/cvw-arch-verif](https://github.com/openhwgroup/cvw-arch-verif) from `95f849e` to `efd70ce`.
- [Commits](95f849e42e...efd70ce71a )
---
updated-dependencies:
- dependency-name: addins/cvw-arch-verif
dependency-type: direct:production
...
Signed-off-by: dependabot[bot] <support@github.com>
|
2024-12-16 14:02:24 +00:00 |
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dependabot[bot]
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421da19b8f
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Bump addins/cvw-arch-verif from b37edba to 95f849e
Bumps [addins/cvw-arch-verif](https://github.com/openhwgroup/cvw-arch-verif) from `b37edba` to `95f849e`.
- [Commits](b37edba7f6...95f849e42e )
---
updated-dependencies:
- dependency-name: addins/cvw-arch-verif
dependency-type: direct:production
...
Signed-off-by: dependabot[bot] <support@github.com>
|
2024-12-09 13:20:11 +00:00 |
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dependabot[bot]
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cfe15481e4
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Bump addins/cvw-arch-verif from d6bae48 to b37edba
Bumps [addins/cvw-arch-verif](https://github.com/openhwgroup/cvw-arch-verif) from `d6bae48` to `b37edba`.
- [Commits](d6bae481c7...b37edba7f6 )
---
updated-dependencies:
- dependency-name: addins/cvw-arch-verif
dependency-type: direct:production
...
Signed-off-by: dependabot[bot] <support@github.com>
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2024-12-02 14:23:25 +00:00 |
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Jordan Carlin
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daddbed8e6
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Revert "Bump addins/verilog-ethernet from c180b22 to 6f5ea41 "
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2024-11-26 08:15:36 -08:00 |
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Jordan Carlin
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6b792f8760
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Update cvw-arch-verif to version with isacov
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2024-11-25 20:33:36 -08:00 |
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Jordan Carlin
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58628ed370
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Remove riscvISACOV submodule
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2024-11-25 15:43:11 -08:00 |
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Jordan Carlin
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486d1dbf33
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Merge pull request #1131 from openhwgroup/dependabot/submodules/addins/vivado-boards-8ed4f99
Bump addins/vivado-boards from `e5f0728` to `8ed4f99`
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2024-11-25 10:40:18 -08:00 |
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Jordan Carlin
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3c3f482a26
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Merge pull request #1135 from openhwgroup/dependabot/submodules/addins/verilog-ethernet-6f5ea41
Bump addins/verilog-ethernet from `c180b22` to `6f5ea41`
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2024-11-25 10:38:27 -08:00 |
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dependabot[bot]
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015b3f0d68
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Bump addins/vivado-boards from e5f0728 to 8ed4f99
Bumps [addins/vivado-boards](https://github.com/Digilent/vivado-boards) from `e5f0728` to `8ed4f99`.
- [Commits](e5f0728cd2...8ed4f9981d )
---
updated-dependencies:
- dependency-name: addins/vivado-boards
dependency-type: direct:production
...
Signed-off-by: dependabot[bot] <support@github.com>
|
2024-11-25 16:59:13 +00:00 |
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Jordan Carlin
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7d80a8992a
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Remove FreeRTOS
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2024-11-25 08:55:46 -08:00 |
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dependabot[bot]
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aa72ed1c19
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Bump addins/verilog-ethernet from c180b22 to 6f5ea41
Bumps [addins/verilog-ethernet](https://github.com/rosethompson/verilog-ethernet) from `c180b22` to `6f5ea41`.
- [Commits](c180b22ed5...6f5ea41584 )
---
updated-dependencies:
- dependency-name: addins/verilog-ethernet
dependency-type: direct:production
...
Signed-off-by: dependabot[bot] <support@github.com>
|
2024-11-25 16:36:14 +00:00 |
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Jordan Carlin
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7be6311f51
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Update cvw-arch-verif submodule
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2024-11-25 08:11:50 -08:00 |
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Jordan Carlin
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2b57633217
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Switch to out of tree riscv-arch-test with VM tests + add pmp & vm tests to testbench
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2024-11-15 22:52:21 -08:00 |
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Jordan Carlin
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c926792941
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Update riscv-arch-test
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2024-11-15 20:24:03 -08:00 |
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Jordan Carlin
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c64c6c4cf1
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Fix reverted submodules
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2024-11-02 16:09:14 -07:00 |
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naichewa
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960d72295c
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Removed SPI hardware interlock test cases
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2024-11-01 11:27:41 -07:00 |
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Rose Thompson
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d4fc3245b0
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Removed ahbsdc submodule since it is no longer used. Updated old
submodules pointing to ross144 to rosethompson repos.
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2024-10-15 10:11:12 -05:00 |
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Mysterio-Abdullah
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da35944dce
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Configuring Zcb
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2024-10-13 17:41:59 -07:00 |
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Jordan Carlin
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1465a9f39f
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Actually update riscv-arch-test
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2024-09-23 22:08:11 -07:00 |
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Jordan Carlin
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2029cb9873
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Update riscv-arch-test submodule
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2024-09-23 15:22:40 -07:00 |
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Jordan Carlin
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cb944e0f92
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Remove old testfloat and replace references
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2024-09-15 01:03:03 -07:00 |
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Jordan Carlin
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76a4ac4b22
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Switch to using testfloat submodule
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2024-09-15 00:37:04 -07:00 |
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Jordan Carlin
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7e41961dd1
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Remove old softfloat and replace references
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2024-09-15 00:34:18 -07:00 |
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Jordan Carlin
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4fe33415d6
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Add softfloat as submodule
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2024-09-15 00:20:39 -07:00 |
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David Harris
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ae225b7a7a
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Updated cvw-arch-verif
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2024-09-05 16:41:58 -07:00 |
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Rose Thompson
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65e338e762
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Merges Jordan's wally.do updates with the new fcov2 changes. Updates
cvw-arch-verif commit.
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2024-08-30 12:31:26 -07:00 |
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Rose Thompson
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a1c6bc854e
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Fixed a subtle questa sim bug with imperasDV. On some linux systems
vsim will default to 32-bit mode rather than 64-bit, but the ImperasDV
libraries are 64-bit. vsim must run in 64-bit mode.
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2024-08-29 14:00:52 -07:00 |
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Rose Thompson
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418bc6b23c
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Merge branch 'main' of github.com:openhwgroup/cvw
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2024-08-21 16:24:10 -07:00 |
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Rose Thompson
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f5d754d2a5
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Updated to point to latest commit of cvw-arch-verif.
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2024-08-21 11:02:23 -07:00 |
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Huda-10xe
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b315a8e338
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Adding regression commands to Makefile
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2024-08-21 15:45:23 +05:00 |
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Huda-10xe
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ca21b865b3
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Adding regression commands to Makefile
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2024-08-21 15:45:23 +05:00 |
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Jordan Carlin
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02f93655ba
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Remove compiled softfloat binary
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2024-08-15 19:01:13 -07:00 |
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Jordan Carlin
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1d3edc73be
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Remove compiled softfloat binary
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2024-08-15 19:01:13 -07:00 |
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David Harris
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77b45f2d75
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Fix creating cvw-arch-verif work directory
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2024-08-08 05:25:28 -07:00 |
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David Harris
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c5c49d3cc0
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Fix creating cvw-arch-verif work directory
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2024-08-08 05:25:28 -07:00 |
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Rose Thompson
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27f89fcdbd
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Updated verilog-ethernet to remove all verilator warnings or at least suppress them.
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2024-07-24 10:13:03 -05:00 |
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Rose Thompson
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fb1869fcb9
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Updated verilog-ethernet to remove all verilator warnings or at least suppress them.
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2024-07-24 10:13:03 -05:00 |
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Rose Thompson
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121342f4cc
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Updated the verilog-ethernet repo to remove most of the warnings. Updated the fpga constraints so the ILA is more useful when using RVVI.
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2024-07-22 16:12:06 -05:00 |
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Rose Thompson
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3c06556833
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Updated the verilog-ethernet repo to remove most of the warnings. Updated the fpga constraints so the ILA is more useful when using RVVI.
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2024-07-22 16:12:06 -05:00 |
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Rose Thompson
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7223b15134
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Merge branch 'rvvi'
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2024-07-22 12:01:01 -05:00 |
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