updated license header

src/ieu/bmu/bitreverse.sv

@@ -4,9 +4,9 @@
 //
 // Written: Kevin Kim <kekim@hmc.edu> and Kip Macsai-Goren <kmacsaigoren@hmc.edu>
 // Created: 1 February 2023
-// Modified: 
+// Modified: 6 March 2023
 //
-// Purpose: Carry-Less multiplication top-level unit
+// Purpose: Bit reverse submodule
 //
 // Documentation: RISC-V System on Chip Design Chapter ***
 // 

src/ieu/bmu/bmuctrl.sv

@@ -3,9 +3,9 @@
 //
 // Written: Kevin Kim <kekim@hmc.edu>
 // Created: 16 February 2023
-// Modified: 
+// Modified: 6 March 2023
 //
-// Purpose: Top level B instruction decoder
+// Purpose: Top level bit manipulation instruction decoder
 // 
 // Documentation: RISC-V System on Chip Design Chapter 4 (Section 4.1.4, Figure 4.8, Table 4.5)
 //

src/ieu/bmu/byte.sv

@@ -1,11 +1,11 @@
 ///////////////////////////////////////////
-// clmul.sv
+// byte.sv
 //
 // Written: Kevin Kim <kekim@hmc.edu>
 // Created: 1 February 2023
-// Modified: 
+// Modified: 6 March 2023
 //
-// Purpose: Carry-Less multiplication top-level unit
+// Purpose: RISCV bitmanip byte-wise operation unit
 //
 // Documentation: RISC-V System on Chip Design Chapter ***
 // 

src/ieu/bmu/clmul.sv

@@ -1,11 +1,11 @@
 ///////////////////////////////////////////
-// clmul.sv (carry-less multiplier)
+// clmul.sv
 //
 // Written: Kevin Kim <kekim@hmc.edu> and Kip Macsai-Goren <kmacsaigoren@hmc.edu>
 // Created: 1 February 2023
 // Modified: 
 //
-// Purpose: Carry-Less multiplication top-level unit
+// Purpose: Carry-Less multiplication unit
 //
 // Documentation: RISC-V System on Chip Design Chapter ***
 // 

src/ieu/bmu/ext.sv

@@ -1,6 +1,6 @@
 
 ///////////////////////////////////////////
-// cnt.sv
+// ext.sv
 //
 // Written: Kevin Kim <kekim@hmc.edu>
 // Created: 4 February 2023

src/ieu/bmu/popcnt.sv

@@ -1,6 +1,6 @@
 
 ///////////////////////////////////////////
-//
+// popccnt.sv
 // Written: Kevin Kim <kekim@hmc.edu>
 // Modified: 2/4/2023
 //

src/ieu/bmu/zbb.sv

@@ -4,9 +4,9 @@
 //
 // Written: Kevin Kim <kekim@hmc.edu> and Kip Macsai-Goren <kmacsaigoren@hmc.edu>
 // Created: 2 February 2023
-// Modified: 
+// Modified: March 6 2023
 //
-// Purpose: RISC-V miscellaneous bit manipulation unit (subset of ZBB instructions)
+// Purpose: RISC-V ZBB top level unit
 //
 // Documentation: RISC-V System on Chip Design Chapter ***
 // 

src/ieu/bmu/zbc.sv

@@ -3,9 +3,9 @@
 //
 // Written: Kevin Kim <kekim@hmc.edu> and Kip Macsai-Goren <kmacsaigoren@hmc.edu>
 // Created: 2 February 2023
-// Modified: 
+// Modified: 3 March 2023
 //
-// Purpose: RISC-V single bit manipulation unit (ZBC instructions)
+// Purpose: RISC-V ZBC top-level unit
 //
 // Documentation: RISC-V System on Chip Design Chapter ***
 //