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https://github.com/openhwgroup/cvw
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removed unneccesary input signal from zbb
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@ -84,7 +84,7 @@ module bitmanipalu #(parameter WIDTH=32) (
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// ZBB Unit
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// ZBB Unit
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if (`ZBB_SUPPORTED) begin: zbb
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if (`ZBB_SUPPORTED) begin: zbb
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zbb #(WIDTH) ZBB(.A, .RevA, .B, .ALUResult, .W64, .lt(CompFlags[0]), .ZBBSelect, .ZBBResult);
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zbb #(WIDTH) ZBB(.A, .RevA, .B, .W64, .lt(CompFlags[0]), .ZBBSelect, .ZBBResult);
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end else assign ZBBResult = 0;
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end else assign ZBBResult = 0;
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// Result Select Mux
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// Result Select Mux
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@ -32,7 +32,6 @@
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module zbb #(parameter WIDTH=32) (
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module zbb #(parameter WIDTH=32) (
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input logic [WIDTH-1:0] A, RevA, B, // Operands
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input logic [WIDTH-1:0] A, RevA, B, // Operands
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input logic [WIDTH-1:0] ALUResult, // ALU Result
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input logic W64, // Indicates word operation
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input logic W64, // Indicates word operation
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input logic lt, // lt flag
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input logic lt, // lt flag
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input logic [2:0] ZBBSelect, // Indicates word operation
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input logic [2:0] ZBBSelect, // Indicates word operation
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