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https://github.com/openhwgroup/cvw
synced 2025-02-11 06:05:49 +00:00
Merge pull request #439 from ross144/main
Fixes to branch predictor processing scripts.
This commit is contained in:
David Harris
GitHub
commit
ea571a6e3b
57
bin/CModelBTBAccuracy.sh
Executable file
57
bin/CModelBTBAccuracy.sh
Executable file
@ -0,0 +1,57 @@
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#!/bin/bash
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###########################################
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## Written: ross1728@gmail.com
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## Created: 23 October 2023
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## Modified:
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##
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## Purpose: Takes a directory of branch outcomes organized as 1 files per benchmark.
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## Computes the geometric mean for btb accuracy
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##
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## A component of the CORE-V-WALLY configurable RISC-V project.
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##
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## Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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##
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## SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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##
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## Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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## except in compliance with the License, or, at your option, the Apache License version 2.0. You
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## may obtain a copy of the License at
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##
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## https:##solderpad.org/licenses/SHL-2.1/
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##
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## Unless required by applicable law or agreed to in writing, any work distributed under the
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## License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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## either express or implied. See the License for the specific language governing permissions
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## and limitations under the License.
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################################################################################################
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Directory="$1"
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Files="$1/*.log"
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for Size in $(seq 6 2 16)
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do
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Product=1.0
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Count=0
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BMDRArray=()
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for File in $Files
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do
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lines=`sim_bp gshare 16 16 $Size 1 $File | tail -5`
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Total=`echo "$lines" | head -1 | awk '{print $5}'`
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Miss=`echo "$lines" | tail -2 | head -1 | awk '{print $8}'`
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BMDR=`echo "$Miss / $Total" | bc -l`
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BMDRArray+=("$BMDR")
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if [ $Miss -eq 0 ]; then
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Product=`echo "scale=200; $Product / $Total" | bc -l`
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else
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Product=`echo "scale=200; $Product * $Miss / $Total" | bc -l`
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fi
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Count=$((Count+1))
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done
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# with such long precision bc outputs onto multiple lines
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# must remove \n and \ from string
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Product=`echo "$Product" | tr -d '\n' | tr -d '\\\'`
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GeoMean=`perl -E "say $Product**(1/$Count)"`
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echo "$Pred$Size $GeoMean"
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done
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117
sim/bpred-sim.py
117
sim/bpred-sim.py
@ -11,6 +11,7 @@
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#
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##################################
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import sys,os,shutil
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import argparse
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class bcolors:
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HEADER = '\033[95m'
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@ -46,55 +47,6 @@ configs = [
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)
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]
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# bpdSize = [6, 8, 10, 12, 14, 16]
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# bpdType = ['twobit', 'gshare', 'global', 'gshare_basic', 'global_basic', 'local_basic']
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# for CurrBPType in bpdType:
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# for CurrBPSize in bpdSize:
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# name = CurrBPType+str(CurrBPSize)
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# configOptions = "+define+INSTR_CLASS_PRED=0 +define+BPRED_OVERRIDE +define+BPRED_TYPE=" + str(bpdType.index(CurrBPType)) + "+define+BPRED_SIZE=" + str(CurrBPSize)
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# tc = TestCase(
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# name=name,
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# variant="rv32gc",
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# cmd="vsim > {} -c <<!\ndo wally-batch.do rv32gc configOptions " + name + " embench " + configOptions,
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# grepstr="")
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# configs.append(tc)
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# bpdSize = [6, 8, 10, 12, 14, 16]
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# for CurrBPSize in bpdSize:
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# name = 'BTB'+str(CurrBPSize)
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# configOptions = "+define+INSTR_CLASS_PRED=1 +define+BPRED_OVERRIDE +define+BPRED_TYPE=\`BP_GSHARE" + "+define+BPRED_SIZE=16" + "+define+BTB_SIZE=" + str(CurrBPSize) + "+define+BTB_OVERRIDE"
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# tc = TestCase(
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# name=name,
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# variant="rv32gc",
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# cmd="vsim > {} -c <<!\ndo wally-batch.do rv32gc configOptions " + name + " embench " + configOptions,
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# grepstr="")
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# configs.append(tc)
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bpdSize = [2, 3, 4, 6, 10, 16]
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for CurrBPSize in bpdSize:
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name = 'RAS'+str(CurrBPSize)
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configOptions = "+define+INSTR_CLASS_PRED=0 +define+BPRED_OVERRIDE +define+BPRED_TYPE=\`BP_GSHARE" + "+define+BPRED_SIZE=16" + "+define+BTB_SIZE=16" + "+define+RAS_SIZE=" + str(CurrBPSize) + "+define+BTB_OVERRIDE+define+RAS_OVERRIDE"
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tc = TestCase(
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name=name,
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variant="rv32gc",
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cmd="vsim > {} -c <<!\ndo wally-batch.do rv32gc configOptions " + name + " embench " + configOptions,
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grepstr="")
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configs.append(tc)
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# bpdSize = [6, 8, 10, 12, 14, 16]
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# LHRSize = [4, 8, 10]
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# bpdType = ['local_repair']
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# for CurrBPType in bpdType:
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# for CurrBPSize in bpdSize:
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# for CurrLHRSize in LHRSize:
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# name = str(CurrLHRSize)+CurrBPType+str(CurrBPSize)
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# configOptions = "+define+INSTR_CLASS_PRED=0 +define+BPRED_TYPE=\"BP_" + CurrBPType.upper() + "\" +define+BPRED_SIZE=" + str(CurrBPSize) + " +define+BPRED_NUM_LHR=" + str(CurrLHRSize) + " "
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# tc = TestCase(
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# name=name,
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# variant="rv32gc",
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# cmd="vsim > {} -c <<!\ndo wally-batch.do rv32gc configOptions " + name + " embench " + configOptions,
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# grepstr="")
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# configs.append(tc)
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import os
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from multiprocessing import Pool, TimeoutError
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@ -138,10 +90,71 @@ def main():
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finally:
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os.mkdir("wkdir")
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if '-makeTests' in sys.argv:
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os.chdir(regressionDir)
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os.system('./make-tests.sh | tee ./logs/make-tests.log')
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parser = argparse.ArgumentParser(description='Runs embench with sweeps of branch predictor sizes and types.')
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mode = parser.add_mutually_exclusive_group()
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mode.add_argument('-r', '--ras', action='store_const', help='Sweep size of return address stack (RAS).', default=False, const=True)
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mode.add_argument('-d', '--direction', action='store_const', help='Sweep size of direction prediction (2-bit, Gshare, local, etc).', default=False, const=True)
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mode.add_argument('-t', '--target', action='store_const', help='Sweep size of branch target buffer (BTB).', default=False, const=True)
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mode.add_argument('-c', '--iclass', action='store_const', help='Sweep size of classification (BTB) Same as -t.', default=False, const=True)
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args = parser.parse_args()
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if(args.direction):
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# for direction predictor size sweep
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bpdSize = [6, 8, 10, 12, 14, 16]
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bpdType = ['twobit', 'gshare', 'global', 'gshare_basic', 'global_basic', 'local_basic']
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for CurrBPType in bpdType:
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for CurrBPSize in bpdSize:
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name = CurrBPType+str(CurrBPSize)
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configOptions = "+define+INSTR_CLASS_PRED=0 +define+BPRED_OVERRIDE +define+BPRED_TYPE=" + str(bpdType.index(CurrBPType)) + "+define+BPRED_SIZE=" + str(CurrBPSize)
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tc = TestCase(
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name=name,
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variant="rv32gc",
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cmd="vsim > {} -c <<!\ndo wally-batch.do rv32gc configOptions " + name + " embench " + configOptions,
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grepstr="")
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configs.append(tc)
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if(args.target or args.iclass):
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# BTB and class size sweep
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bpdSize = [6, 8, 10, 12, 14, 16]
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for CurrBPSize in bpdSize:
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name = 'BTB'+str(CurrBPSize)
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configOptions = "+define+INSTR_CLASS_PRED=1 +define+BPRED_OVERRIDE +define+BPRED_TYPE=\`BP_GSHARE" + "+define+BPRED_SIZE=16" + "+define+RAS_SIZE=16+define+BTB_SIZE=" + str(CurrBPSize) + "+define+BTB_OVERRIDE"
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tc = TestCase(
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name=name,
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variant="rv32gc",
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cmd="vsim > {} -c <<!\ndo wally-batch.do rv32gc configOptions " + name + " embench " + configOptions,
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grepstr="")
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configs.append(tc)
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# ras size sweep
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if(args.ras):
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bpdSize = [2, 3, 4, 6, 10, 16]
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for CurrBPSize in bpdSize:
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name = 'RAS'+str(CurrBPSize)
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configOptions = "+define+INSTR_CLASS_PRED=0 +define+BPRED_OVERRIDE +define+BPRED_TYPE=\`BP_GSHARE" + "+define+BPRED_SIZE=16" + "+define+BTB_SIZE=16" + "+define+RAS_SIZE=" + str(CurrBPSize) + "+define+BTB_OVERRIDE+define+RAS_OVERRIDE"
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tc = TestCase(
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name=name,
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variant="rv32gc",
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cmd="vsim > {} -c <<!\ndo wally-batch.do rv32gc configOptions " + name + " embench " + configOptions,
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grepstr="")
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configs.append(tc)
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# bpdSize = [6, 8, 10, 12, 14, 16]
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# LHRSize = [4, 8, 10]
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# bpdType = ['local_repair']
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# for CurrBPType in bpdType:
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# for CurrBPSize in bpdSize:
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# for CurrLHRSize in LHRSize:
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# name = str(CurrLHRSize)+CurrBPType+str(CurrBPSize)
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# configOptions = "+define+INSTR_CLASS_PRED=0 +define+BPRED_TYPE=\"BP_" + CurrBPType.upper() + "\" +define+BPRED_SIZE=" + str(CurrBPSize) + " +define+BPRED_NUM_LHR=" + str(CurrLHRSize) + " "
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# tc = TestCase(
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# name=name,
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# variant="rv32gc",
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# cmd="vsim > {} -c <<!\ndo wally-batch.do rv32gc configOptions " + name + " embench " + configOptions,
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# grepstr="")
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# configs.append(tc)
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# Scale the number of concurrent processes to the number of test cases, but
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# max out at a limited number of concurrent processes to not overwhelm the system
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with Pool(processes=min(len(configs),40)) as pool:
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@ -51,20 +51,20 @@ module icpred import cvw::*; #(parameter cvw_t P,
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// An alternative to using the BTB to store the instruction class is to partially decode
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// the instructions in the Fetch stage into, Call, Return, Jump, and Branch instructions.
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// This logic is not described in the text book as of 23 February 2023.
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logic ccall, cj, cjr, ccallr, CJumpF, CBranchF;
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logic cjal, cj, cjr, cjalr, CJumpF, CBranchF;
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logic NCJumpF, NCBranchF;
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if(P.C_SUPPORTED) begin
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logic [4:0] CompressedOpcF;
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assign CompressedOpcF = {PostSpillInstrRawF[1:0], PostSpillInstrRawF[15:13]};
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assign ccall = CompressedOpcF == 5'h09 & P.XLEN == 32;
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assign cjal = CompressedOpcF == 5'h09 & P.XLEN == 32;
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assign cj = CompressedOpcF == 5'h0d;
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assign cjr = CompressedOpcF == 5'h14 & ~PostSpillInstrRawF[12] & PostSpillInstrRawF[6:2] == 5'b0 & PostSpillInstrRawF[11:7] != 5'b0;
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assign ccallr = CompressedOpcF == 5'h14 & PostSpillInstrRawF[12] & PostSpillInstrRawF[6:2] == 5'b0 & PostSpillInstrRawF[11:7] != 5'b0;
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assign CJumpF = ccall | cj | cjr | ccallr;
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assign cjalr = CompressedOpcF == 5'h14 & PostSpillInstrRawF[12] & PostSpillInstrRawF[6:2] == 5'b0 & PostSpillInstrRawF[11:7] != 5'b0;
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assign CJumpF = cjal | cj | cjr | cjalr;
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assign CBranchF = CompressedOpcF[4:1] == 4'h7;
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end else begin
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assign {ccall, cj, cjr, ccallr, CJumpF, CBranchF} = '0;
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assign {cjal, cj, cjr, cjalr, CJumpF, CBranchF} = '0;
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end
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assign NCJumpF = PostSpillInstrRawF[6:0] == 7'h67 | PostSpillInstrRawF[6:0] == 7'h6F;
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@ -72,11 +72,11 @@ module icpred import cvw::*; #(parameter cvw_t P,
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assign BPBranchF = NCBranchF | (P.C_SUPPORTED & CBranchF);
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assign BPJumpF = NCJumpF | (P.C_SUPPORTED & (CJumpF));
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assign BPReturnF = (NCJumpF & (PostSpillInstrRawF[19:15] & 5'h1B) == 5'h01) | // returnurn must returnurn to ra or r5
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(P.C_SUPPORTED & (ccallr | cjr) & ((PostSpillInstrRawF[11:7] & 5'h1B) == 5'h01));
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assign BPReturnF = (NCJumpF & (PostSpillInstrRawF[19:15] & 5'h1B) == 5'h01 & PostSpillInstrRawF[11:7] == 5'b0) | // return must return to ra or r5
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(P.C_SUPPORTED & cjr & ((PostSpillInstrRawF[11:7] & 5'h1B) == 5'h01));
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assign BPCallF = (NCJumpF & (PostSpillInstrRawF[11:07] & 5'h1B) == 5'h01) | // call(r) must link to ra or x5
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(P.C_SUPPORTED & (ccall | (ccallr & (PostSpillInstrRawF[11:7] & 5'h1b) == 5'h01)));
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(P.C_SUPPORTED & (cjal | (cjalr & (PostSpillInstrRawF[11:7] & 5'h1b) == 5'h01)));
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end else begin
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// This section connects the BTB's instruction class prediction.
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@ -340,8 +340,21 @@ module ifu import cvw::*; #(parameter cvw_t P) (
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end else begin : bpred
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mux2 #(P.XLEN) pcmux1(.d0(PCPlus2or4F), .d1(IEUAdrE), .s(PCSrcE), .y(PC1NextF));
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logic BranchM, JumpM, BranchW, JumpW;
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logic CallD, CallE, CallM, CallW;
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logic ReturnD, ReturnE, ReturnM, ReturnW;
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assign BPWrongE = PCSrcE;
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assign {InstrClassM, BPDirPredWrongM, BTAWrongM, RASPredPCWrongM, IClassWrongM} = '0;
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icpred #(P, 0) icpred(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
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.PostSpillInstrRawF, .InstrD, .BranchD, .BranchE, .JumpD, .JumpE, .BranchM, .BranchW, .JumpM, .JumpW,
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.CallD, .CallE, .CallM, .CallW, .ReturnD, .ReturnE, .ReturnM, .ReturnW,
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.BTBCallF(1'b0), .BTBReturnF(1'b0), .BTBJumpF(1'b0),
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.BTBBranchF(1'b0), .BPCallF(), .BPReturnF(), .BPJumpF(), .BPBranchF(), .IClassWrongM,
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.IClassWrongE(), .BPReturnWrongD());
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flopenrc #(1) PCSrcMReg(clk, reset, FlushM, ~StallM, PCSrcE, BPWrongM);
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assign RASPredPCWrongM = '0;
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assign BPDirPredWrongM = BPWrongM;
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assign BTAWrongM = BPWrongM;
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assign InstrClassM = {CallM, ReturnM, JumpM, BranchM};
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assign NextValidPCE = PCE;
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end
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