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https://github.com/openhwgroup/cvw
synced 2025-02-11 06:05:49 +00:00
Added wally-riscv-arch-test MMU tests and removed imperas MMU tests from regresssion
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c1969ca142
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@ -33,6 +33,7 @@ rv64i_sc_tests = \
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WALLY-PMA \
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WALLY-PMA \
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WALLY-PMP
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WALLY-PMP
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rv64i_tests = $(addsuffix .elf, $(rv64i_sc_tests))
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rv64i_tests = $(addsuffix .elf, $(rv64i_sc_tests))
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target_tests += $(rv64i_tests)
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target_tests += $(rv64i_tests)
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@ -629,40 +629,6 @@ terminate_test:
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ecall # writes mcause to the output.
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ecall # writes mcause to the output.
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csrw mtvec, x4 # restore original trap handler to halt program
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csrw mtvec, x4 # restore original trap handler to halt program
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/*
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# ---------------------------------------------------------------------------------------------
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RVTEST_IO_WRITE_STR(x31, "Test End\n")
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# ---------------------------------------------------------------------------------------------
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RV_COMPLIANCE_HALT
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RV_COMPLIANCE_CODE_END
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# Input data section.
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.data
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.align 3 # align stack to 8 byte boundary
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bottom_of_stack:
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.fill 1024, 4, -1
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top_of_stack:
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# Output data section.
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RV_COMPLIANCE_DATA_BEGIN
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.align 3 # align output to 8 byte boundary
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test_1_res:
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.fill 1024, 4, -1
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RV_COMPLIANCE_DATA_END
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.align 3
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test_cases:
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*/
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RVTEST_CODE_END
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RVTEST_CODE_END
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RVMODEL_HALT
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RVMODEL_HALT
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@ -678,37 +644,13 @@ bottom_of_stack:
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top_of_stack:
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top_of_stack:
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RVMODEL_DATA_BEGIN
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RVMODEL_DATA_BEGIN
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// next lines through test cases copied over from old framework
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test_1_res:
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test_1_res:
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.fill 1024, 4, -1
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.fill 1024, 4, -1
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RVMODEL_DATA_END
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RVMODEL_DATA_END
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/*
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signature_x8_0:
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.fill 0*(XLEN/32),4,0xdeadbeef
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signature_x8_1:
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.fill 19*(XLEN/32),4,0xdeadbeef
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signature_x1_0:
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.fill 256*(XLEN/32),4,0xdeadbeef
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signature_x1_1:
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.fill 256*(XLEN/32),4,0xdeadbeef
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signature_x1_2:
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.fill 148*(XLEN/32),4,0xdeadbeef
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*/
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#ifdef rvtest_mtrap_routine
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#ifdef rvtest_mtrap_routine
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mtrap_sigptr:
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mtrap_sigptr:
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@ -51,7 +51,7 @@ tc = TestCase(
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grepstr="400100000 instructions")
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grepstr="400100000 instructions")
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configs.append(tc)
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configs.append(tc)
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tests64gc = ["arch64i", "arch64priv", "arch64c", "arch64m", "arch64d", "imperas64i", "imperas64f", "imperas64d", "imperas64p", "imperas64mmu", "imperas64m", "imperas64a", "imperas64c"] # "wally64i", #, "testsBP64"]
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tests64gc = ["arch64i", "arch64priv", "arch64c", "arch64m", "arch64d", "imperas64i", "imperas64f", "imperas64d", "imperas64p", "imperas64m", "imperas64a", "imperas64c", "wally64priv"] # "wally64i", #, "testsBP64"]
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for test in tests64gc:
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for test in tests64gc:
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tc = TestCase(
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tc = TestCase(
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name=test,
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name=test,
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@ -59,7 +59,7 @@ for test in tests64gc:
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cmd="vsim > {} -c <<!\ndo wally-pipelined-batch.do rv64gc "+test+"\n!",
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cmd="vsim > {} -c <<!\ndo wally-pipelined-batch.do rv64gc "+test+"\n!",
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grepstr="All tests ran without failures")
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grepstr="All tests ran without failures")
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configs.append(tc)
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configs.append(tc)
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tests32gc = ["arch32i", "arch32priv", "arch32c", "arch32m", "arch32f", "imperas32i", "imperas32f", "imperas32p", "imperas32mmu", "imperas32m", "imperas32a", "imperas32c"] #"wally32i",
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tests32gc = ["arch32i", "arch32priv", "arch32c", "arch32m", "arch32f", "imperas32i", "imperas32f", "imperas32p", "imperas32m", "imperas32a", "imperas32c", "wally32priv"] #"wally32i",
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for test in tests32gc:
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for test in tests32gc:
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tc = TestCase(
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tc = TestCase(
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name=test,
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name=test,
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@ -1,3 +1,3 @@
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vsim -c <<!
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vsim -c <<!
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do wally-pipelined-batch.do rv32ic arch32i
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do wally-pipelined-batch.do rv64gc wally64priv
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!
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!
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@ -117,18 +117,7 @@ module mmu #(parameter TLB_ENTRIES = 8, // number of TLB Entries
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///////////////////////////////////////////
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///////////////////////////////////////////
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pmachecker pmachecker(.*);
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pmachecker pmachecker(.*);
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// if the number of entries is zero or no csr no pmp checker
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generate
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if(`PMP_ENTRIES > 0) begin : pmpchecker
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pmpchecker pmpchecker(.*);
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pmpchecker pmpchecker(.*);
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end else begin
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assign PMPInstrAccessFaultF = 1'b0;
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assign PMPLoadAccessFaultM = 1'b0;
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assign PMPStoreAccessFaultM = 1'b0;
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end
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endgenerate
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// If TLB miss and translating we want to not have faults from the PMA and PMP checkers.
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// If TLB miss and translating we want to not have faults from the PMA and PMP checkers.
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// assign SquashBusAccess = PMASquashBusAccess | PMPSquashBusAccess;
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// assign SquashBusAccess = PMASquashBusAccess | PMPSquashBusAccess;
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@ -73,6 +73,10 @@ module pmpchecker (
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assign PMPInstrAccessFaultF = EnforcePMP && ExecuteAccessF && ~|X;
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assign PMPInstrAccessFaultF = EnforcePMP && ExecuteAccessF && ~|X;
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assign PMPStoreAccessFaultM = EnforcePMP && WriteAccessM && ~|W;
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assign PMPStoreAccessFaultM = EnforcePMP && WriteAccessM && ~|W;
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assign PMPLoadAccessFaultM = EnforcePMP && ReadAccessM && ~|R;
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assign PMPLoadAccessFaultM = EnforcePMP && ReadAccessM && ~|R;
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end else begin: pmpchecker // no checker
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assign PMPInstrAccessFaultF = 0;
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assign PMPLoadAccessFaultM = 0;
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assign PMPStoreAccessFaultM = 0;
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end
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end
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endgenerate
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endgenerate
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//assign PMPSquashBusAccess = PMPInstrAccessFaultF | PMPLoadAccessFaultM | PMPStoreAccessFaultM;
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//assign PMPSquashBusAccess = PMPInstrAccessFaultF | PMPLoadAccessFaultM | PMPStoreAccessFaultM;
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@ -27,6 +27,7 @@
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`define RISCVARCHTEST "1"
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`define RISCVARCHTEST "1"
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`define WALLYTEST "2"
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`define WALLYTEST "2"
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`define MYIMPERASTEST "3"
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`define MYIMPERASTEST "3"
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// *** remove MYIMPERASTEST cases when ported
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string tvpaths[] = '{
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string tvpaths[] = '{
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"../../addins/imperas-riscv-tests/work/",
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"../../addins/imperas-riscv-tests/work/",
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@ -1484,7 +1485,11 @@ string imperas32f[] = '{
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};
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};
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string wally64priv[] = '{
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string wally64priv[] = '{
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`WALLYTEST
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`WALLYTEST,
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"rv64i_m/privilege/WALLY-MMU-SV39", "30A0",
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"rv64i_m/privilege/WALLY-MMU-SV48", "30A0",
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"rv64i_m/privilege/WALLY-PMA", "30A0",
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"rv64i_m/privilege/WALLY-PMP", "30A0"
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};
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};
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string wally64periph[] = '{
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string wally64periph[] = '{
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@ -1497,7 +1502,10 @@ string wally32i[] = '{
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};
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};
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string wally32priv[] = '{
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string wally32priv[] = '{
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`WALLYTEST
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`WALLYTEST,
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"rv32i_m/privilege/WALLY-MMU-SV32", "3080",
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"rv32i_m/privilege/WALLY-PMA", "3080",
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"rv32i_m/privilege/WALLY-PMP", "3080"
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};
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};
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string wally32periph[] = '{
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string wally32periph[] = '{
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