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https://github.com/openhwgroup/cvw
synced 2025-02-03 02:05:21 +00:00
Fixed issue with branch deriv configs.
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58580445ab
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@ -154,22 +154,11 @@ localparam PLIC_SPI_ID = 32'd6;
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localparam PLIC_SDC_ID = 32'd9;
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localparam BPRED_SUPPORTED = 1;
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// this is an annoying hack for the branch predictor parameterization override.
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`ifdef BPRED_OVERRIDE
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localparam BPRED_TYPE = `BPRED_TYPE;
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localparam BPRED_SIZE = `BPRED_SIZE;
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`else
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localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_SIZE = 32'd10;
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`endif
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localparam BPRED_NUM_LHR = 32'd6;
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`ifdef BTB_OVERRIDE
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localparam BTB_SIZE = `BTB_SIZE;
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localparam RAS_SIZE = `RAS_SIZE;
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`else
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localparam BTB_SIZE = 32'd10;
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localparam RAS_SIZE = 32'd16;
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`endif
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localparam INSTR_CLASS_PRED = 1;
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localparam SVADU_SUPPORTED = 1;
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@ -72,7 +72,7 @@ def getBuildrootTC(boot):
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BRcmd="vsim > {} -c <<!\ndo wally-batch.do buildroot buildroot $RISCV "+str(INSTR_LIMIT)+" 1 0 -coverage\n!"
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else:
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print( "buildroot no coverage")
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BRcmd="vsim > {} -c <<!\ndo wally-batch.do buildroot buildroot $RISCV "+str(INSTR_LIMIT)+" 1 0\n!"
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BRcmd="vsim > {} -c <<!\ndo wally-batch.do buildroot buildroot -GINSTR_LIMIT=" +str(INSTR_LIMIT) + " \n!"
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BRgrepstr=str(INSTR_LIMIT)+" instructions"
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return TestCase(name,variant="rv64gc",cmd=BRcmd,grepstr=BRgrepstr)
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@ -41,6 +41,7 @@ module testbench;
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parameter I_CACHE_ADDR_LOGGER=0;
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parameter D_CACHE_ADDR_LOGGER=0;
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parameter RISCV_DIR = "/opt/riscv";
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parameter INSTR_LIMIT = 0;
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`include "parameter-defs.vh"
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@ -543,7 +544,8 @@ module testbench;
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logic [P.XLEN-1:0] Minstret;
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assign Minstret = testbench.dut.core.priv.priv.csr.counters.counters.HPMCOUNTER_REGW[2];
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always @(negedge clk) begin
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if((Minstret != 0) && (Minstret % 'd100000 == 0)) $display("Reached %d instructions", Minstret);
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if((Minstret != 0) && (Minstret % 'd100000 == 0)) $display("Reached %d instructions, %d", Minstret, INSTR_LIMIT);
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if((Minstret == INSTR_LIMIT) & (INSTR_LIMIT!=0)) begin $stop; $stop; end
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end
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end
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