From d6b8a5e595a79602924fff330bad834e2850d82f Mon Sep 17 00:00:00 2001
From: David Harris <david_harris@hmc.edu>
Date: Sat, 17 Jul 2021 14:48:44 -0400
Subject: [PATCH] hptw: Unified PageTableEntryM and PageTableEntryF outputs of
 pagetablewalker into PTE

---
 wally-pipelined/src/lsu/lsu.sv             | 9 ++++++---
 wally-pipelined/src/mmu/pagetablewalker.sv | 6 +++---
 2 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/wally-pipelined/src/lsu/lsu.sv b/wally-pipelined/src/lsu/lsu.sv
index 81a22f797..291db2596 100644
--- a/wally-pipelined/src/lsu/lsu.sv
+++ b/wally-pipelined/src/lsu/lsu.sv
@@ -118,7 +118,7 @@ module lsu
   logic [`PA_BITS-1:0] 	       MemPAdrM;  // from mmu to dcache
  
   logic 		       DTLBMissM;
-  logic [`XLEN-1:0] 	       PageTableEntryM;
+  logic [`XLEN-1:0] 	       PTE, PageTableEntryM;
   logic 		       DTLBWriteM;
   logic [`XLEN-1:0] 	       HPTWReadPTE;
   logic 		       HPTWStall;  
@@ -157,8 +157,8 @@ module lsu
 				  .ITLBMissF(ITLBMissF),
 				  .DTLBMissM(DTLBMissM),
 				  .MemRWM(MemRWM),
-				  .PageTableEntryF(PageTableEntryF),
-				  .PageTableEntryM(PageTableEntryM),
+				  .PTE(PTE),
+//				  .PageTableEntryM(PageTableEntryM),
 				  .PageType,
 				  .ITLBWriteF(ITLBWriteF),
 				  .DTLBWriteM(DTLBWriteM),
@@ -171,6 +171,9 @@ module lsu
 				  .WalkerInstrPageFaultF(WalkerInstrPageFaultF),
 				  .WalkerLoadPageFaultM(WalkerLoadPageFaultM),  
 				  .WalkerStorePageFaultM(WalkerStorePageFaultM));
+
+  assign PageTableEntryM = PTE;
+  assign PageTableEntryF = PTE;
   
   assign WalkerPageFaultM = WalkerStorePageFaultM | WalkerLoadPageFaultM;
 
diff --git a/wally-pipelined/src/mmu/pagetablewalker.sv b/wally-pipelined/src/mmu/pagetablewalker.sv
index c475919b9..a1b7cc807 100644
--- a/wally-pipelined/src/mmu/pagetablewalker.sv
+++ b/wally-pipelined/src/mmu/pagetablewalker.sv
@@ -41,7 +41,7 @@ module pagetablewalker
    input logic [1:0]	    MemRWM,
 
    // Outputs to the TLBs (PTEs to write)
-   output logic [`XLEN-1:0] PageTableEntryF, PageTableEntryM,
+   output logic [`XLEN-1:0] PTE, //PageTableEntryM,
    output logic [1:0]	    PageType,
    output logic		    ITLBWriteF, DTLBWriteM,
    output logic 	    SelPTW,
@@ -120,8 +120,8 @@ module pagetablewalker
 	  
       // Assign specific outputs to general outputs
 	  // *** try to eliminate this duplication, but attempts caused MMU to hang
-      assign PageTableEntryF = CurrentPTE;
-      assign PageTableEntryM = CurrentPTE;
+      assign PTE = CurrentPTE;
+    //  assign PageTableEntryM = CurrentPTE;
 
 	  assign SelPTW = (WalkerState != IDLE) & (WalkerState != FAULT);
 	  assign DTLBWriteM = (WalkerState == LEAF) & DTLBWalk;