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Merge branch 'openhwgroup:main' into main

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Rose Thompson 2024-11-14 16:15:26 -06:00 committed by GitHub
commit d311ee238c
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6 changed files with 33 additions and 44 deletions
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2
config/derivlist.txt
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@ -444,6 +444,7 @@ DCACHE_SUPPORTED 0
VIRTMEM_SUPPORTED 0
ZICBOM_SUPPORTED 0
ZICBOZ_SUPPORTED 0
ZICCLSM_SUPPORTED 0
SVPBMT_SUPPORTED 0
SVNAPOT_SUPPORTED 0
ZAAMO_SUPPORTED 0
@ -455,6 +456,7 @@ DCACHE_SUPPORTED 0
VIRTMEM_SUPPORTED 0
ZICBOM_SUPPORTED 0
ZICBOZ_SUPPORTED 0
ZICCLSM_SUPPORTED 0
SVPBMT_SUPPORTED 0
SVNAPOT_SUPPORTED 0
ZAAMO_SUPPORTED 0

3
config/rv32gc/coverage.svh
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@ -5,6 +5,9 @@
// This file is needed in the config subdirectory for each config supporting coverage.
// It defines which extensions are enabled for that config.
// Define XLEN, used in covergroups
`define XLEN32 1
// Unprivileged extensions
`include "RV32I_coverage.svh"
`include "RV32M_coverage.svh"

3
config/rv64gc/coverage.svh
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@ -5,6 +5,9 @@
// This file is needed in the config subdirectory for each config supporting coverage.
// It defines which extensions are enabled for that config.
// Define XLEN, used in covergroups
`define XLEN64 1
// Unprivileged extensions
`include "RV64I_coverage.svh"
`include "RV64M_coverage.svh"

1
src/fpu/fcmp.sv
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@ -75,6 +75,7 @@ module fcmp import cvw::*; #(parameter cvw_t P) (
3'b0?1: if (P.ZFA_SUPPORTED)
CmpNV = Zfa ? EitherSNaN : EitherNaN; // fltq,fleq / flt,fle perform CompareQuietLess / CompareSignalingLess differing on when to set invalid
else CmpNV = EitherNaN; // flt, fle
3'b100: CmpNV = 1'b0;
default: CmpNV = 1'bx;
endcase
end

5
src/fpu/fround.sv
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@ -146,7 +146,8 @@ module fround import cvw::*; #(parameter cvw_t P) (
packoutput #(P) packoutput(W, Fmt, FRound); // pack and NaN-box based on selected format.
// Flags
assign FRoundNV = XSNaN; // invalid if input is signaling NaN
assign FRoundNX = ZfaFRoundNX & ~EgeNf & (Rp | Tp); // Inexact if Round or Sticky bit set for FRoundNX instruction
assign FRoundNV = XSNaN; // invalid if input is signaling NaN
assign FRoundNX = ZfaFRoundNX & ~EgeNf & (Rp | Tp) & ~XNaN; // Inexact if Round or Sticky bit set for FRoundNX instruction
// Note: NX must not be raised if input is invalid
endmodule

21
tests/coverage/WALLY-init-lib.h
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@ -28,12 +28,6 @@
// The PMP tests are sensitive to the exact addresses in this code, so unfortunately
// modifying anything breaks those tests.
// Provides simple firmware services through ecall. Place argument in a0 and issue ecall:
// 0: change to user mode
// 1: change to supervisor mode
// 3: change to machine mode
// 4: terminate program
.section .text.init
.global rvtest_entry_point
@ -134,18 +128,6 @@ write_tohost:
self_loop:
j self_loop # wait
// utility routines
# put a 1 in msb of a0 (position XLEN-1); works for both RV32 and RV64
setmsb:
li a0, 0x80000000 # 1 in bit 31
slli a1, a0, 1 # check if register is wider than 31 bits
beqz a1, setmsbdone # yes, a0 has 1 in bit 31
slli a0, a0, 16 # no: shift a0 to have 1 inn bit 63
slli a0, a0, 16 # use two shifts of 16 bits each to be compatible with compiling either RV32 or 64
setmsbdone:
ret # return to calller
.section .tohost
tohost: # write to HTIF
.dword 0
@ -157,9 +139,6 @@ begin_signature:
.fill 6*(XLEN/32),4,0xdeadbeef #
end_signature:
scratch:
.fill 4,4,0x0
# Initialize stack with room for 512 bytes
.bss
.space 512